ISPP Erase Step for MLC Flash Read Margin
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Solution Overview
Problem
Multi-level cell (MLC) flash memory devices face challenges with reduced read margins due to narrowing threshold voltage gaps and coupling effects between memory cells, particularly affecting erased cells during programming.
Innovation Solution
The implementation of Incremental Step Pulse Programming (ISPP) that includes an erase programming step after the (N−1)th page and before the Nth page programming, which increases the threshold voltage distribution of erased cells, thereby negating the coupling effect and reducing the width of threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits stored per cell is increased to achieve higher integration, then storage density is improved, but the gap between threshold voltage distributions narrows, reducing read margins
Solution Approach 1:
The patent applies preliminary action by performing an erase programming operation before the final Nth page programming operation. This preliminary erase step increases the threshold voltage distribution of erased cells, creating a safety margin that compensates for the narrowed gaps between threshold voltage distributions in high-density MLC cells, thereby maintaining read margins while achieving higher storage density
2Ease of operation
If programming operations are performed sequentially page-by-page from LSB to MSB, then programming control is simplified, but coupling effects between memory cells accumulate, negatively impacting read margins
Solution Approach 1:
The patent applies preliminary anti-action by inserting an erase programming operation before the final Nth page programming. This preliminary erase step counteracts the cumulative coupling effects that have built up during sequential programming of previous pages. By increasing the threshold voltage distribution of erased cells at this intermediate stage, the patent creates a compensating effect that offsets the harmful coupling effects, maintaining read margins while preserving the simplicity of sequential page-by-page programming control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the coupling effect on erased cells and overall threshold voltage distributions, enhancing read margins and programming efficiency in MLC flash memory devices.
Implementation Method 1
this is accomplished by setting the threshold voltage (e.g., through Fowler-Nordheim tunneling) of each memory cell MC to within one of 2N threshold distributions
Data Source
AI summary
A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory includes executing an incremental step pulse programming (ISPP) operation on the MLC memory cells, where the ISPP operation includes a programming sequence of first through Nth page programming operations, where N is an integer of 2 or more. The programming sequence further includes an erase programming that is executed after the (N−1)th page programming operation and before the Nth page programming operation, where the erase page programming increases a threshold voltage distribution of erase cells among the MLC memory cells.