MLC Memory Hard Bit Reuse for Decoding Reliability
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Solution Overview
Problem
Multi-Level Cell (MLC) flash memory devices face performance degradation due to additional latency introduced by performing extra sense operations to generate soft bits for error correction, which can lead to increased read latency and reduced reliability in data retrieval.
Innovation Solution
The system utilizes hard bits from one logical page of an MLC memory as soft bits for another logical page, generating reliability information to enhance decoding without the need for additional read operations, thereby avoiding the performance penalty associated with conventional soft bit reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional sense operations are performed to generate soft bits for error correction, then decoding reliability is improved, but read latency increases
Solution Approach 1:
The patent applies preliminary action by performing sense operations to read hard bits from all logical pages before decoding any of them. The hard bits from previously read logical pages are then reused as soft bits for subsequent logical pages during decoding. This eliminates the need for additional sense operations that would normally be required to generate soft bits, thereby maintaining decoding reliability while avoiding increased read latency.
2Reliability
If conventional soft bit reading is performed, then error correction effectiveness is improved, but read performance degrades
Solution Approach 1:
The patent applies universality by making hard bits serve multiple functions. The hard bits from previously read logical pages are reused as soft bits for subsequent logical pages during decoding. This allows the same data (hard bits) to serve both as the primary data for one logical page and as reliability information (soft bits) for another logical page, eliminating the need for separate soft bit reading operations and maintaining read performance while improving error correction effectiveness.
3Loss of time
If hard bits are read from all logical pages before decoding, then soft bit information is obtained without additional read operations, but decoding order must be changed
Solution Approach 1:
The patent applies dynamics by making the decoding process adaptive to the read order. Instead of a fixed decode-immediately-after-read approach, the system dynamically adjusts by buffering hard bits from all logical pages first, then performing decoding in an optimized sequence where previously decoded logical pages provide soft bit information for subsequent pages. This dynamic approach adds minimal complexity while eliminating the need for additional sense operations.
Data Source
AI summary
A method at a data storage device includes determining a first hard bit of a first logical page, the first hard bit corresponding to a particular cell of the MLC memory. A second hard bit of a second logical page is sensed. The second hard bit corresponds to the particular cell. The first hard bit is used as a soft bit of the second logical page to provide reliability information during a decode operation of the second logical page.