Multi-Level Cell Non-Volatile Memory Read Control via Segmented Reference Currents
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Solution Overview
Problem
Current non-volatile memory technologies face challenges in accurately determining the storage states of multi-level memory cells during read operations, particularly in distinguishing between various storage states due to similar cell currents generated across different states.
Innovation Solution
A sensing circuit is employed to sequentially provide different reference currents to judge the storage states of memory cells, utilizing a current supply circuit, path selecting circuit, and judging circuit to determine the storage states of all memory cells in a selected row by converting reference currents into reference voltages and comparing them with sensed voltages from the memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level memory cells are used to increase storage capacity, then the data storage capability is improved, but the difficulty of accurately distinguishing storage states increases due to similar cell currents
Solution Approach 1:
The read operation is segmented into multiple phases, with each phase dedicated to reading a specific storage state. Reference currents are segmented into multiple discrete levels, each corresponding to a specific storage state threshold. This segmentation allows the sensing circuit to systematically distinguish between multiple storage states by comparing cell currents against segmented reference levels.
Solution Approach 2:
The patent changes the parameter of reference current from a single fixed value to multiple variable levels. By adjusting the reference current to match different storage state thresholds, the system can dynamically adapt the comparison parameter to distinguish between various storage states that produce similar cell currents.
2Measurement precision
If multiple reference currents are used to accurately judge storage states, then the measurement precision is improved, but the read operation time increases
Solution Approach 1:
The read operation employs periodic action by cycling through multiple read phases, each phase using a specific reference current level. The sensing circuit systematically applies reference currents in a periodic sequence (first reference current, then second reference current, and so on), allowing accurate multi-state detection while maintaining a structured time-efficient workflow.
Solution Approach 2:
The patent applies preliminary action by pre-establishing multiple reference current levels before the actual read operation. The sensing circuit is pre-configured with the sequence of reference currents corresponding to different storage state thresholds, enabling rapid sequential comparison without requiring dynamic adjustment during the read process.
3Measurement precision
If a sensing circuit with multiple reference currents is implemented, then the storage state identification accuracy is improved, but the device complexity increases
Solution Approach 1:
The sensing circuit is designed with multi-functionality to handle multiple storage state readings using a single unified structure. The same sensing circuit components are reused across different read phases with different reference current levels, eliminating the need for separate dedicated circuits for each storage state and reducing overall device complexity.
Solution Approach 2:
The patent introduces a control signal as an intermediary to manage the complexity of multi-reference current operations. The control signal coordinates the selection and application of different reference current levels, simplifying the control logic and making the multi-function sensing circuit easier to manage and implement.
Data Source
Figure 1A~1E
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AI summary
A non-volatile memory includes a cell array, a current supply circuit, a path selecting circuit and a judging circuit. The cell array includes plural multi-level memory cells in an m×n array. The cell array is connected with m word lines and n lines. The current supply circuit provides one of plural reference currents according to a current control value. The path selecting circuit is connected with the current supply circuit and the n bit lines. The judging circuit is connected with the path selecting circuit, and generates n output data. A first path selector of the path selecting circuit is connected with a path selecting circuit and a first bit line. A first judging device of the judging circuit is connected with the first path selector and generates a first output data.