MLC Memory Encoding with State Shaping and ECC for Cell Reliability
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Solution Overview
Problem
Nonvolatile memory devices with multi-level cells (MLCs) face reliability issues due to increased degeneration and decreased operation speed, primarily because of the complexity in managing multiple states and voltage levels during write and read operations, which affects the overall performance and efficiency.
Innovation Solution
A method and system that simultaneously perform state shaping and error correction coding (ECC) operations using a polar code to reduce the number of memory cells required for programming, thereby minimizing the number of states and voltage levels, and utilizing a data converter to generate alignment vectors and codewords that optimize memory cell usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a multi-level cell (MLC) scheme is used to increase memory capacity, then the number of data bits stored per memory cell increases, but memory cell degeneration increases and operation speed decreases
Solution Approach 1:
The patent applies parameter changes by modifying the voltage distribution across memory cells through state shaping encoding. Specifically, it transforms the data bits into an encoded sequence that reduces the number of times high voltage levels are programmed, thereby reducing cumulative stress and degeneration on memory cells while maintaining high storage capacity through the MLC scheme
Solution Approach 2:
The patent implements preliminary action by performing state shaping encoding on data before it is written to memory cells. The encoding process pre-adjusts the voltage programming sequence to minimize future degradation, proactively addressing reliability issues before they manifest during actual memory operations
2Quantity of substance
If a multi-level cell (MLC) scheme is used to increase memory capacity, then the number of data bits stored per memory cell increases, but operation speed decreases
Solution Approach 1:
The patent uses parameter changes in the encoding domain to improve operation speed. By transforming data into an optimized voltage sequence through state shaping, the patent reduces the number of programming iterations required during write operations, thereby accelerating memory operations while preserving high capacity through MLC architecture
3Quantity of substance
If the number of states programmed in memory cells is increased, then memory capacity increases, but memory cell degeneration increases
Solution Approach 1:
The patent applies parameter changes by encoding data into a state-shapeed sequence that limits the frequency and duration of high-voltage programming events. This transforms the raw data voltage profile into an optimized sequence that achieves the same information storage capacity while reducing the cumulative harmful voltage stress that causes memory cell degeneration
Data Source
AI summary
Channel selection information indicate positions of data bits of input data, positions of error correction code (ECC) parity bits for correcting errors in the input data, and positions of state shaping parity bits. The ECC parity bits and the state shaping parity bits are generated to cause a decrease in a quantity of memory cells, of the plurality of memory cells, in which at least one target state among a plurality of states is programmed. An alignment vector is generated based on aligning the data bits of the input data, the ECC parity bits, and the state shaping parity bits, based on the channel selection information. A codeword is generated based on simultaneously performing state shaping and ECC encoding with respect to the alignment vector. Write data are written in the nonvolatile memory device based on the codeword.