MLC Non-Volatile Memory Data Reading Method with Variable Bit Representation

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Solution Overview

Problem

Multi-level cell (MLC) non-volatile memory devices face inefficiencies in data transmission due to the need for multiple bits to represent three signal-levels, leading to increased transmission time and overhead.

Innovation Solution

A method involving lower-page and upper-page reads of MLC NVM cells, where results are stored in separate buffers and the upper-page read results are gated based on lower-page read results, allowing for efficient representation of signal-levels using one-bit or two-bit values, reducing data transmission requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If traditional multi-bit representation is used for three signal-levels in MLC NVM, then complete data representation is achieved, but transmission time and overhead increase

Engineering Contradiction:
Improvedata representation completenessVSAvoidtransmission time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the data representation length variable rather than fixed. The system dynamically adjusts between 1-bit and 2-bit representation for each signal-level based on the specific data being transmitted. This allows the transmission format to adapt to the actual information content, reducing average transmission time while maintaining complete data representation when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of data representation length from a constant value to a variable value. By using different bit-length representations (1-bit or 2-bit) for different signal-levels, the system optimizes transmission efficiency. This parameter change allows the same data structure to achieve both compact representation and complete information transmission.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If fixed 2-bit representation is used for all signal-levels, then data accuracy is maintained, but transmission overhead increases

Engineering Contradiction:
Improvedata accuracyVSAvoiddata transmission volume
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent varies the representation parameter (bit-length) based on the signal-level being transmitted. Some signal-levels use 1-bit representation while others use 2-bit representation, optimizing the balance between data accuracy and transmission volume. This selective parameter adjustment reduces overall data transmission volume while maintaining the precision needed for accurate data representation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically selects the appropriate bit-length for each signal-level based on the specific data characteristics. This dynamic adaptation allows the transmission system to use minimal bits when sufficient for accurate representation, while using more bits when needed, thereby reducing overall transmission overhead without sacrificing data accuracy.

Inventive Principle:
Principle #15Dynamics

3Productivity

If variable data representation is implemented, then transmission efficiency improves, but system complexity increases

Engineering Contradiction:
Improvetransmission efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the data transmission process into distinct parts: lower-page read results and upper-page read results are handled separately with different representation schemes. This segmentation allows each segment to be optimized independently, improving overall transmission efficiency while keeping the complexity of each individual segment manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary gating mechanism that controls which upper-page read results are transmitted based on the lower-page read results. This intermediary layer manages the complexity by providing a clear decision rule for when to transmit additional data, simplifying the overall system architecture while achieving variable representation efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9502104B2Multi-level cell (MLC) non-volatile memory data reading method and apparatus
Publication Date: 2016.11.22 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US9502104B2 patent drawing
  • US9502104B2 patent drawing
  • US9502104B2 patent drawing

AI summary

Embodiments include systems, methods, and apparatuses for reading the signal-level of three-signal-level cells in a non-volatile memory (NVM). In one embodiment, a receiver may be configured to receive a serial string of values and identify which values in the string are the results of a lower-page read or an upper-page read of the cells. In some embodiments, one signal-level of a three-signal level cell may be represented only by a value in the lower-page read of the cells, while a second signal-level of the three-signal level cell may be represented by a value in the lower-page read of the cells and an upper-page read of the cells.