Multi-Level Cell Memory Read Voltage Adjustment
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Solution Overview
Problem
Multi-level cell memory devices face increased read failure rates due to overlapping threshold voltage distributions as the number of bits stored in a single memory cell increases, leading to errors in data reading and programming.
Innovation Solution
A memory device with a multi-level cell array, a programming unit, an error analysis unit, and a controller that analyzes read error information to adjust the read voltage level, thereby correcting errors and improving data page programming accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits stored in a single memory cell increases, then the storage capacity is improved, but the read failure rate increases due to overlapping threshold voltage distributions
Solution Approach 1:
The patent applies dynamics by making the read voltage level adjustable rather than fixed. The read voltage level adjustment unit dynamically changes the read voltage level based on the type of data to be programmed, allowing the system to adapt to different threshold voltage distributions and minimize read failures while maintaining high storage capacity
Solution Approach 2:
The patent changes the parameter of read voltage level to resolve the contradiction. By adjusting the read voltage level according to the data type (first data page vs. second data page), the system can distinguish between overlapping threshold voltage distributions and reduce read failures while maintaining multi-bit storage capability
2Measurement precision
If the read voltage level is adjusted based on error analysis, then the read accuracy is improved, but the programming complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-defining different read voltage levels for different data types before programming occurs. The read voltage level adjustment unit is configured to select appropriate voltage levels based on data type classification, eliminating the need for complex real-time error analysis and simplifying the programming process while maintaining high read accuracy
Solution Approach 2:
The patent uses feedback by analyzing read error information and using it to adjust the read voltage level. The read voltage level adjustment unit receives feedback about read errors and data types, then selects appropriate voltage levels to minimize future read failures, creating a closed-loop system that improves accuracy without requiring complex real-time adjustments
Data Source
AI summary
Provided are memory devices and memory programming methods. A memory device may include: a multi-level cell array that includes a plurality of multi-level cells; a programming unit that programs a first data page in the plurality of multi-level cells and programs a second data page in a multi-level cell from among the plurality of multi-level cells in which the first data page is programmed; an error analysis unit that analyzes read error information corresponding to the first data page based on a read voltage level to determine whether to correct a read error based on the analyzed read error information; and a controller that adjusts the read voltage level of the first data page depending on the determination result. Through this, it is possible to reduce an error occurrence when reading and/or programming a data page.