MLC NAND Flash Block Management for Access Speed

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Solution Overview

Problem

The increasing size of physical blocks in flash memory systems leads to longer data movement times, resulting in slower data access speeds, particularly in applications like computer operating systems that frequently access specific data.

Innovation Solution

A block management method for MLC NAND flash memory that configures logical blocks for frequent access and uses the faster writing lower pages of multiple physical blocks to store data, improving access speed by optimizing data storage and retrieval processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of stationary object

If the volume design of each physical block becomes greater, then the storage capacity is improved, but the time spent on moving old valid data is increased

Engineering Contradiction:
Improvephysical block volumeVSAvoiddata movement time
Core Design Contradiction:
Volume of stationary objectVSLoss of time

Solution Approach 1:

The physical block is segmented into multiple pages, which are further divided into upper pages and lower pages. This segmentation allows the system to write data to smaller units (pages) rather than moving entire large blocks, thereby reducing data movement time while maintaining large block volumes for storage capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of page organization within physical blocks, creating a hierarchical structure (blocks → pages → upper/lower pages). This multi-dimensional organization enables selective writing to lower pages for frequently accessed data, improving access speed without sacrificing the large volume of physical blocks.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of stationary object

If the physical block size is increased, then the storage capacity is improved, but the data access speed deteriorates

Engineering Contradiction:
Improvephysical block volumeVSAvoiddata access speed
Core Design Contradiction:
Volume of stationary objectVSSpeed

Solution Approach 1:

The patent applies local quality by differentiating between upper pages and lower pages within physical blocks, where lower pages are optimized for faster writing. Frequently accessed data is specifically placed in lower pages, giving them special treatment and faster access characteristics, while other data remains in upper pages or standard blocks.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system creates a copy mechanism where frequently accessed data is written to lower pages of physical blocks, which have faster write speeds. This copying strategy allows the system to maintain large physical block volumes for storage while providing fast access paths for frequently accessed data through the lower page copy.

Inventive Principle:
Principle #26Copying

3Volume of stationary object

If the physical block volume is increased, then the storage capacity is improved, but the writing speed deteriorates

Engineering Contradiction:
Improvephysical block volumeVSAvoidwriting speed
Core Design Contradiction:
Volume of stationary objectVSProductivity

Solution Approach 1:

By segmenting physical blocks into pages and further into upper/lower pages, the system enables parallel or selective writing operations. Writers can target specific lower pages within large blocks, achieving high writing speed for critical data without being constrained by the total block volume.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a page-level dimension within physical blocks, creating a hierarchical writing structure. This allows writers to operate at the page level rather than block level, achieving fine-grained control and high writing speeds for specific data while maintaining large block volumes for overall storage capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8250286B2Block management method, and storage system and controller using the same
Publication Date: 2012.08.21 PHISON ELECTRONICS
  • US8250286B2 patent drawing
  • US8250286B2 patent drawing
  • US8250286B2 patent drawing

AI summary

A block management method for managing a multi level cell (MLC) NAND flash memory is provided, wherein the MLC NAND flash memory has a plurality of physical blocks grouped into at least a data area and a spare area, each of the physical blocks has a plurality of pages divided into a plurality of upper pages, and a plurality of lower pages with a writing speed thereof being greater than that of the upper pages. The block management method includes configuring a plurality of logical blocks for being accessed by a host, recording the logical block belonging to a frequently accessed block and executing a special mode to use the lower pages of at least two physical blocks of the MLC NAND flash memory for storing data of one logical block belonging to the frequently accessed block. Accordingly, it is possible to increase the access speed of a storage system.