MLC NAND Flash Buffering for Lower Page Corruption Prevention

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Solution Overview

Problem

Conventional MLC NAND Flash memory devices face data corruption issues during power failures due to the programming of higher-order pages, which can irrecoverably corrupt data stored in lower pages, especially since host systems may acknowledge data as saved before power is fully secured.

Innovation Solution

A data storage device with a separate non-volatile buffer and a controller that accumulates data to be written to MLC non-volatile memory devices, writes data to lower pages, and upon power restoration, writes the data from the buffer to the memory devices, ensuring data integrity by de-allocating buffer space only after higher-order pages are programmed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If power-fail protection is implemented using super-capacitors or discrete capacitors to maintain power during write operations, then data integrity is improved, but device size, cost, and reliability deteriorate

Engineering Contradiction:
Improvedata integrityVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the power-fail protection function from the main storage device by using a separate, smaller buffer memory component. This buffer is specifically dedicated to holding lower page data during programming operations, separating the protection mechanism from the bulk storage system and reducing overall device complexity while maintaining data integrity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The buffer memory acts as an intermediary between the host system and the MLC NAND Flash memory during programming operations. It temporarily holds lower page data that needs protection, mediating the data flow and enabling safe programming of higher-order pages without requiring large super-capacitors or discrete capacitor arrays.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If lower page data is programmed first followed by higher-order pages in MLC NAND Flash, then programming speed is improved, but data corruption risk worsens upon power failure

Engineering Contradiction:
Improveprogramming speedVSAvoiddata corruption risk
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by writing lower page data to the buffer memory before programming the higher-order pages in MLC NAND Flash. This preparatory step ensures that protected copies of lower page data are already in place and will not be corrupted if power fails during the higher-order page programming operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The buffer memory provides beforehand cushioning by maintaining protected copies of lower page data during the programming of higher-order pages. This cushioning protection is established in advance and remains active throughout the programming operation, preventing data corruption without requiring large super-capacitors.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentEP2920698B1Methods and devices for avoiding lower page corruption in data storage devices
Publication Date: 2018.12.12 WESTERN DIGITAL TECHNOLOGIES INC
  • EP2920698B1 patent drawingFigure 1
  • EP2920698B1 patent drawingFigure 2
  • EP2920698B1 patent drawingFigure 3~4

AI summary

A data storage device may comprise a plurality of Multi-Level Ceil (MLC) non- volatile memory devices comprising a plurality of lower pages and a corresponding plurality of higher-order pages. A controller may be configured to write data to and read data from the plurality of lower pages and the corresponding plurality of higher- order pages. A buffer may be coupled to the controller, which may be configured to accumulate data to be written to the MLC non-volatile memory devices, allocate space in the buffer and write the accumulated data to the allocated space, At least a portion of the accumulated data may be written in a lower page of the MLC non- volatile memory devices and the space in the buffer that stores data written to the lower page may be de-allocated when ail higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.