MLC NVM Bit Reading via Grouped Threshold Voltage Segmentation
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Solution Overview
Problem
Existing Multi-Level Cell (MLC) Non-Volatile Memory (NVM) technologies face limitations in threshold voltage resolution and reading speed, with single gate voltage schemes being limited by sensing current accuracy and multiple gate voltage schemes being slow due to the need for multiple voltage applications.
Innovation Solution
A new bit reading scheme is introduced where threshold voltages are programmed into multiple levels and divided into groups, with multiple applied gate voltages corresponding to threshold voltage groups, allowing for higher resolution and faster reading through the use of reference currents and logic circuitry to determine bit information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single gate voltage is applied to MLC NVM cells, then the reading speed is fast, but the threshold voltage resolution is limited by sensing current accuracy
Solution Approach 1:
The patent divides the threshold voltage range into multiple groups, with each group further divided into sub-groups. By applying multiple gate voltages corresponding to different groups and using segmentation of the sensing process, the system achieves higher resolution (resolving individual sub-groups within groups) while maintaining efficient operation through the structured approach to multi-bit reading.
2Measurement precision
If multiple gate voltages are applied to MLC NVM cells, then the threshold voltage resolution is improved, but the reading speed becomes slow
Solution Approach 1:
The patent applies preliminary actions by first dividing threshold voltages into groups and determining group membership before resolving individual bit values. The gate voltages are applied in a structured sequence where group identification precedes sub-group resolution, allowing the system to efficiently navigate the threshold voltage landscape and reduce overall reading time while maintaining high resolution.
3Measurement precision
If multiple threshold voltage levels are divided into groups and sub-groups, then multi-bit information can be accurately obtained, but the device complexity increases
Solution Approach 1:
The patent segments the threshold voltage spectrum into hierarchical groups and sub-groups, allowing systematic resolution of multi-bit information. This segmentation approach organizes the complex voltage landscape into manageable sections that can be addressed through structured gate voltage application and sensing operations.
Solution Approach 2:
The patent employs dynamic gate voltage application where voltages are adjusted based on the grouping structure. The system dynamically selects and applies appropriate gate voltages corresponding to different groups and sub-groups, enabling flexible and efficient navigation through the threshold voltage states to accurately resolve multi-bit information.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables higher threshold voltage resolution and faster bit reading, achieving efficient multi-bit data retrieval in MLC NVM cells with improved accuracy and speed compared to conventional methods.
Implementation Method 1
the states of MLC NVM cells can be determined by directly comparing the cell responding current with several preset reference currents. For the example of a two-bit MLC NVM cells in NOR-type flash, the threshold voltages of NVM cells are divided into four groups for representing (11), (10), (01), and (00) as shown in FIG. 1. A constant gate voltage Va, between the groups of threshold voltages of (01) and (00) is applied to the gates of MLC NVM cells. The NVM cell response currents are ID(11)>ID(10)>ID(01)>ID(00) for the voltage differences of Va−Vth(11)>Va−Vth(10)>Va−Vth(01)>Va−Vth(00)
Data Source
AI summary
Structures and methods of converting Multi-Level Cell (MLC) Non-Volatile Memory (NVM) into multi-bit information are disclosed. In MLC NVM system, multi-bit information stored in NVM cell is represented by the states of NVM cell threshold voltage levels. In this disclosure, “P” states of NVM cell threshold voltage levels are divided into “N” groups of threshold voltage levels. Each group contains “M” states of multiple threshold voltage levels of NVM cells, where P=N×M. The “M” states of NVM cell threshold voltage levels in each group are sensed and resolved by applying one correspondent gate voltage to the group. By applying “N” multiple gate voltages, the whole “P” states of NVM cell threshold voltage levels can be sensed and efficiently converted into storing bits in the MLC NVM cells.


