Multi-Level Memory Cell Programming Method for Data Density

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Solution Overview

Problem

Current semiconductor memory devices face challenges in maximizing data density and reducing housekeeping operations, particularly in multi-level nonvolatile memory cells, especially in three-dimensional memory cell arrays, where efficient data storage and programming methods are needed to optimize data capacity and minimize unnecessary operations.

Innovation Solution

The implementation of a programming method that partitions data into single-bit and multi-bit data across physical pages in multi-level memory cells, allowing for efficient storage and reduced housekeeping operations by using a controller to manage data according to specific page capacities and capacities, thereby optimizing data storage in both two-dimensional and three-dimensional memory cell arrays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level memory cells are used to increase data density, then data storage capacity is improved, but programming complexity and housekeeping operations increase

Engineering Contradiction:
Improvedata storage capacityVSAvoidprogramming complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments data into different types (new data vs. updated data) and applies different programming strategies to each. New data is programmed using multi-bit simultaneous programming to MLCs, while updated data uses single-bit programming. This segmentation resolves the contradiction by simplifying the programming process through targeted approaches rather than uniform complex handling of all data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary classification of incoming data to identify which portions are new and which are updates before programming begins. This preliminary action allows the system to prepare appropriate programming strategies in advance, reducing the complexity of the actual programming operation while maintaining high data density utilization.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multi-bit data is simultaneously programmed to MLCs, then programming speed is improved, but data accuracy and reliability may deteriorate

Engineering Contradiction:
Improveprogramming speedVSAvoiddata accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies different programming qualities to different data portions: multi-bit simultaneous programming is applied to new data where speed is critical, while single-bit programming is applied to updated data where accuracy is paramount. This local differentiation of programming quality resolves the contradiction by matching the programming method to the specific requirements of each data type.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the programming parameters (number of bits programmed simultaneously) based on the data type being written. For new data, higher bit-width programming is used to maximize speed, while for updated data, lower bit-width programming ensures higher accuracy. This dynamic parameter adjustment resolves the speed-accuracy tradeoff.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If data is partitioned and programmed to multiple physical pages, then data storage flexibility is improved, but the number of housekeeping operations increases

Engineering Contradiction:
Improvedata storage flexibilityVSAvoidhousekeeping operations time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent merges the programming operations for new data and updated data into a unified process where both are programmed to the same physical pages when possible. This merging reduces the number of separate housekeeping operations needed compared to treating all data uniformly, while still maintaining the flexibility to partition data across multiple pages when required by capacity constraints.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9223692B2Nonvolatile memory device with multi-level memory cells and programming method
Publication Date: 2015.12.29 SAMSUNG ELECTRONICS CO LTD
  • US9223692B2 patent drawing
  • US9223692B2 patent drawing
  • US9223692B2 patent drawing

AI summary

A non-volatile memory (NVM) includes a memory cell array of multi-level memory cells (MLC) arranged in physical pages. A programming method for the NVM includes; receiving first data and partitioning the first data according to a single bit page capacity of a physical page to generate partitioned first data, programming the partitioned first data as single-bit data to a plurality of physical pages, and receiving second data and programming the second data as multi-bit data to a selected physical page among the plurality of physical pages, wherein the second data is simultaneously programmed to the MLC of the selected physical page.