Read Threshold Calibration for SSD MLC Memory
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Solution Overview
Problem
Data storage devices, such as solid state drives (SSDs), face challenges in accurately detecting bit values during read threshold calibrations due to issues like neighbor plane disturb, where lower pages are misread as upper pages, leading to errors undetectable by error correction codes.
Innovation Solution
Implementing a single-level cell (SLC) read to sense the ratio of bit values at read thresholds, adjusting the calibrated read threshold based on deviations from expected ratios to accurately match voltage states in multi-level cell (MLC) memory, and using alerts to rectify deviations by repeating calibration or relocating data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MLC scheme is used to store multiple bits in each flash memory cell, then storage density is enhanced, but read accuracy deteriorates due to page misreading and neighbor plane disturb
Solution Approach 1:
The patent implements a feedback mechanism where the controller performs SLC reads at calibrated read thresholds, compares the sensed statistic (ratio of 1's and 0's) to an expected statistic, and adjusts the calibrated read threshold based on the deviation detected. This closed-loop feedback ensures read accuracy is maintained even when MLC storage density is increased
Solution Approach 2:
The patent replaces the traditional MLC read mechanism with an SLC read mechanism at calibrated thresholds. By reading at a single threshold (SLC mode) rather than multiple thresholds (MLC mode), the system achieves more reliable bit detection while still supporting MLC storage density through the calibration process
2Productivity
If read threshold calibration is performed without detection mechanism, then calibration speed is maintained, but reliability deteriorates due to undetected page discrepancies
Solution Approach 1:
The patent incorporates a feedback-based detection mechanism where the controller senses the statistic of read thresholds, compares it to expected values, and generates alerts when deviations are detected. This allows the calibration process to maintain speed while ensuring reliability through automatic detection and correction of page discrepancies
Solution Approach 2:
The patent performs detection during the calibration process itself rather than as a separate post-calibration step. By sensing and comparing statistics at the calibrated read thresholds during calibration, the system proactively identifies issues before they affect data operations, maintaining both speed and reliability
Data Source
AI summary
Data storage devices, such as solid state drives (SSDs), are disclosed. A read threshold calibration operation is utilized to generate a calibrated read threshold for one or more voltage states of a cell of a MLC memory. A single-level cell (SLC) read is then executed to sense the ratio of bit values at the read thresholds of the voltage states, where SLC read refers to reading at a single read threshold, rather than to the cell type. The sensing results in a binary page with certain statistics of 1's and 0's. The ratio of 1's (or 0's) in the binary page is used to determine a deviation from the expected ratio, where the deviation is used to adjust the calibrated read threshold to match the voltage states of the MLC memory.