Multi-Level Cell Sensing via Charge Transfer Device
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Solution Overview
Problem
Current memory devices face challenges in accurately sensing multi-level memory cells, which store more than two states, leading to potential data degradation due to unwanted disturbances during read operations, and there is a need for improved techniques to enhance read/write speeds, reliability, and data retention while reducing power consumption and manufacturing costs.
Innovation Solution
The proposed solution involves a charge transfer device coupled with a sense component that applies multiple gate voltages to sense a multi-level memory cell, allowing for multiple sense operations during a single read operation to accurately determine the logic state stored, thereby preventing data degradation and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple sense operations are performed during a single read operation to accurately determine the logic state of multi-level memory cells, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The read operation is segmented into multiple discrete sense operations, each targeting a specific logic state threshold. The sense component performs sequential comparisons against different reference voltages to progressively determine the stored logic state, breaking down the complex multi-level sensing task into manageable binary decision stages.
Solution Approach 2:
The sensing process employs periodic action through multiple sequential sense operations within a single read cycle. Each sense operation is performed at a different time with different gate voltage levels, allowing the system to accumulate information about the stored state through repeated measurements rather than a single complex operation.
2Measurement precision
If multiple gate voltages are applied to sense multi-level memory cells, then measurement precision is improved, but use of energy increases
Solution Approach 1:
The system applies partial action by performing only the necessary number of sense operations to determine the logic state. If an earlier sense operation clearly identifies the state, subsequent operations may be skipped or performed with reduced voltage levels, avoiding excessive energy consumption while maintaining measurement precision.
Solution Approach 2:
The gate voltage parameter is dynamically changed across different sense operations, with each operation using optimized voltage levels tailored to the specific logic state being detected. This allows the system to use higher voltages only when necessary for discrimination and lower voltages when the state is already determined, reducing overall power consumption.
3Reliability
If multiple sense operations are conducted during a single read operation, then reliability is improved, but read/write speed decreases
Solution Approach 1:
Preliminary action is implemented by performing sense operations in a predetermined sequence with optimized timing. The sense component prepares reference voltages and sensing circuits in advance, and executes multiple sense operations during a single read cycle without requiring separate read operations, thereby improving reliability without proportionally increasing the overall read time.
Solution Approach 2:
The useful action of sensing continues throughout the read operation through multiple sequential sense operations. Rather than completing one sense operation and then initiating another read cycle, the system maintains continuous sensing activity with different voltage levels within the same read window, maximizing productivity while ensuring accurate logic state determination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of read operations, reduces data degradation, and allows for the storage of multiple logic states, improving the overall performance and reliability of memory devices while potentially reducing manufacturing costs and power consumption.
Implementation Method 1
a charge transfer device may be coupled with a digit line and a node of a sense component. When a voltage of the digit line is less than a voltage of a gate of the charge transfer device, the charge may be transferred to the node
Data Source
AI summary
Techniques are provided for sensing a memory cell configured to store three or more states. A charge may be transferred between a digit line and a node coupled with a sense component using a charge transfer device. During a single read operation, multiple voltages may be applied to the gate of the charge transfer device. The node may be sensed a number of times based on a number of voltages applied to the gate of the charge transfer device. The charge may be transferred by the charge transfer device based on a value of the signal on a digit line and a voltage applied to the gate of the charge transfer device. Based on the charge being transferred and the sense component sensing the node multiple times, a logic state associated with the memory cell may be determined.