Multi-Level Cell Programming Voltage Gap Threshold Control
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Solution Overview
Problem
Rewritable non-volatile memory modules experience increased error bits in data read as usage time and access count grow, leading to inefficient data correction operations.
Innovation Solution
A memory management method that determines and configures a specific programming mode for memory cells based on the gap between erased and programmed state voltages, operating the cells in fewer states if the gap exceeds a threshold, thereby reducing error bits and extending module lifetime.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data correction operation is performed to correct error bits in memory cells, then data reliability is improved, but operation time increases significantly
Solution Approach 1:
The patent applies preliminary action by performing voltage gap analysis and programming mode adjustment before error bits accumulate to critical levels. The controller proactively monitors voltage characteristics and switches programming modes in advance, preventing severe degradation that would require time-consuming correction operations later.
Solution Approach 2:
The system implements feedback by continuously monitoring the voltage gap between erased and programmed states, and adjusting the programming mode based on this feedback. When the voltage gap exceeds the threshold, the system switches to a reduced-state programming mode, creating a closed-loop control that maintains data reliability while optimizing operation time.
2Quantity of substance
If memory cells are operated in a programming mode with more states to increase storage capacity, then storage density is improved, but voltage gap narrows leading to more error bits
Solution Approach 1:
The patent applies dynamics by making the programming mode adaptable rather than fixed. The system dynamically switches between full-state programming mode (for normal operation) and reduced-state programming mode (when voltage gap narrows), allowing the memory to optimize between storage capacity and data reliability based on real-time voltage characteristics.
Solution Approach 2:
The system changes the programming parameter (number of states) based on the voltage gap measurement. When the voltage gap between erased and programmed states narrows below the threshold, the system reduces the number of programming states from the original multi-state configuration to a fewer-state configuration, thereby widening the effective voltage margin and reducing error bits.
3Reliability
If memory cells are operated in a programming mode with fewer states to reduce error bits, then data reliability is improved, but storage capacity decreases
Solution Approach 1:
The programming mode is made dynamic, switching between full-state mode (higher capacity) and reduced-state mode (higher reliability) based on voltage gap conditions. This allows the system to maximize storage capacity when voltage characteristics are good, and switch to reduced-state operation only when necessary to maintain reliability.
Solution Approach 2:
The system changes the programming parameter (number of states) conditionally based on voltage gap measurement. By switching to fewer states only when the voltage gap narrows below the threshold, the system minimizes the impact on storage capacity while maintaining data reliability when needed.
4Quantity of substance
If threshold voltage distribution ranges are expanded to increase storage capacity, then storage density is improved, but voltage overlap increases causing more read errors
Solution Approach 1:
The patent changes the voltage parameter by switching from a fine-grained multi-state voltage distribution (higher density) to a coarser fewer-state voltage distribution (lower density but better separation). When voltage gap narrows, the system reduces the number of distinguishable voltage levels, thereby increasing the effective margin between states and reducing read errors.
Data Source
AI summary
A memory management method, a memory storage device and a memory controlling circuit unit are provided. The method comprises: obtaining an erased state voltage of a first memory cell and a programmed state voltage of the first memory cell, where the first memory cell is operated in a first programming mode; and operating the first memory cell in a second programming mode if a width of a gap between the erased state voltage and the programmed state voltage is larger than a first threshold value. Accordingly, the reliability of the first memory cell may be improved.