Multilayer Ceramic Capacitor Asymmetric Electrodes Inductance Noise
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Solution Overview
Problem
Multilayer ceramic capacitors face challenges in miniaturization and high capacitance, leading to increased equivalent series inductance (ESL) which deteriorates electronic product performance, and generate acoustic noise due to piezoelectric vibrations transferred to printed circuit boards, causing discomfort through vibration noise.
Innovation Solution
A multilayer ceramic capacitor design with specific dimensions and configurations, including dielectric layers, internal electrodes, external electrodes, and cover layers, optimized to reduce inductance and acoustic noise by controlling thickness, width, gap between electrodes, and dielectric grain size, and mounting on printed circuit boards with offset electrode pads to minimize vibration transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the capacitor is miniaturized and capacitance is increased, then the size is reduced and capacitance is improved, but the equivalent series inductance increases causing performance deterioration
Solution Approach 1:
The patent employs asymmetric electrode arrangement where external electrodes are positioned on the side surfaces rather than end surfaces, creating an asymmetric current path that reduces inductance. The internal electrodes are also asymmetrically configured with different numbers of electrodes on each side, optimizing the current distribution to minimize inductive effects while maintaining compact size.
Solution Approach 2:
The patent transitions from conventional end-surface electrode placement to side-surface electrode placement, effectively changing the dimensional orientation of current flow. This dimensional shift allows for shorter current paths and reduced inductance by utilizing the side surfaces of the ceramic body for electrode attachment.
2Reliability
If voltage is applied to the multilayer ceramic capacitor, then capacitance function is achieved, but piezoelectric vibrations occur causing acoustic noise
Solution Approach 1:
The asymmetric electrode configuration creates uneven stress distribution during voltage application, which helps dissipate piezoelectric vibrations more effectively. The different numbers of internal electrodes on each side and the offset external electrode positions prevent uniform vibration patterns that would generate acoustic noise.
Solution Approach 2:
The patent applies different structural characteristics to different regions of the capacitor. The cover layers have different thicknesses on opposite sides, and the external electrodes are positioned at different locations, creating local variations in mechanical properties that reduce the transmission of vibrations to the mounting board.
3Reliability
If the distance between external terminals is decreased to reduce inductance, then inductance is reduced, but the structural stability and mounting reliability may be affected
Solution Approach 1:
By moving electrodes from end surfaces to side surfaces, the patent creates a different spatial relationship between external terminals. This dimensional change allows for optimized electrode spacing that reduces inductance while maintaining adequate structural dimensions for stable mounting and connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces inductance and acoustic noise, improving electric performance and reliability while preventing mounting defects and maintaining adhesive strength, thereby enhancing the overall functionality of electronic components.
Implementation Method 1
Since the dielectric layers have piezoelectric and electrostrictive properties, when direct current (DC) or alternating current (AC) voltage is applied to the multilayer ceramic capacitor, a piezoelectric phenomenon may occur between the internal electrodes, causing vibrations.
Implementation Method 2
Since the dielectric layers have piezoelectric and electrostrictive properties, when direct current (DC) or alternating current (AC) voltage is applied to the multilayer ceramic capacitor, a piezoelectric phenomenon may occur between the internal electrodes, causing vibrations.
Data Source
AI summary
A multilayer ceramic capacitor may include: a ceramic body including dielectric layers and having first and second main surfaces opposing each other, first and second side surfaces opposing each other, and first and second end surfaces opposing each other; an active layer configured to form capacitance by including first and second internal electrodes facing each other with one dielectric layer therebetween and alternately exposed to the first or second side surface; upper and lower cover layers disposed on and below the active layer; and a first external electrode disposed on the first side surface and a second external electrode disposed on the second side surface. Thickness T and width W of the ceramic body satisfy 0.75W≦T≦1.25W, gap G between the first and second external electrodes satisfies 30 μm≦G≦0.9W, and an average number of dielectric grains in a single dielectric layer in a thickness direction thereof is 2 or greater.