Multilayer Ceramic Capacitor Electrode Layout With Cavity Via Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing multilayer ceramic capacitors face challenges in ensuring flexibility in the layout of outer electrodes while minimizing the influence of via conductor layout.
Innovation Solution
The design includes a multilayer ceramic capacitor with alternating first and second via conductors, insulated by a dielectric layer, and spaced outer electrodes connected through cavities in an insulating layer, allowing for flexible layout without interference from via conductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via conductors are arranged in a fixed pattern to ensure electrical connectivity, then electrical connection reliability is improved, but layout flexibility of outer electrodes deteriorates
Solution Approach 1:
The via conductors are segmented into multiple groups (first via conductors and second via conductors) with different connectivity functions. First via conductors connect to first inner electrode layers while second via conductors connect to second inner electrode layers, allowing independent routing paths that enable flexible outer electrode layout while maintaining reliable electrical connections.
Solution Approach 2:
The patent utilizes the vertical dimension by alternating via conductor types in the lamination direction. First and second via conductors are positioned at different heights and connect to different electrode layers, creating a three-dimensional routing structure that provides layout flexibility on the surface while ensuring reliable electrical connectivity through the stacked architecture.
2Loss of energy
If outer electrodes are positioned close to via conductors to reduce parasitic inductance, then equivalent series inductance is reduced, but manufacturing complexity increases due to alignment requirements
Solution Approach 1:
Outer electrodes are segmented into first and second outer electrodes that respectively cover first and second via conductors. This segmentation allows each outer electrode to be independently positioned and connected to its corresponding via conductors, reducing parasitic inductance through close proximity while simplifying manufacturing by eliminating complex multi-point alignment requirements.
Solution Approach 2:
The insulating layer with embedded cavities automatically positions and isolates the via conductors, allowing outer electrodes to be placed directly over the cavities without complex alignment procedures. The cavity structure provides self-alignment features that reduce parasitic inductance while maintaining manufacturing simplicity.
3Quantity of substance
If multiple via conductors are used to increase capacitance density, then capacitance density is improved, but equivalent series inductance increases due to additional current paths
Solution Approach 1:
Via conductors are segmented into first and second types that connect to different inner electrode layers. This segmentation creates parallel current paths that increase capacitance density while the alternating arrangement and insulating layer structure optimize current distribution to minimize parasitic inductance accumulation.
Solution Approach 2:
The patent exploits the vertical stacking dimension to arrange first and second via conductors at different heights, connecting to alternating inner electrode layers. This three-dimensional via conductor arrangement increases effective capacitance density while the distributed vertical layout reduces loop areas and minimizes equivalent series inductance.
Data Source
AI summary
In a multilayer ceramic capacitor, an insulating layer is provided on a first main surface of a capacitor main body and includes multiple cavities. At least one first outer electrode and at least one second outer electrode are mutually spaced on the insulating layer. The at least one first outer electrode covers corresponding multiple first via conductors and at least one second via conductor. The at least one first outer electrode is electrically connected to the corresponding multiple first via conductors through a corresponding cavity of the multiple cavities. The at least one second outer electrode is electrically connected to corresponding multiple second via conductors through a corresponding cavity of the multiple cavities.