Multilayer Ceramic Capacitor Dielectric Patterns
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Solution Overview
Problem
In multilayer ceramic capacitors (MLCCs), the difference in thickness between internal electrodes and dielectric layers leads to structural irregularities, causing steps that reduce reliability by bending internal electrodes and lowering breakdown voltage characteristics, particularly as the number of stacked layers increases.
Innovation Solution
The MLCC design includes first and second internal electrodes alternately exposed on opposing surfaces, with first and second dielectric patterns in corresponding spaces to prevent step generation, and side insulating layers on external surfaces to protect internal electrodes, ensuring accurate alignment and enhanced capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked dielectric layers is increased to improve capacitance, then the capacitance increases, but steps are generated due to thickness differences between internal electrodes and dielectric layers, causing internal electrode bending and reducing reliability
Solution Approach 1:
The patent applies local quality by forming dielectric patterns with different thicknesses in different regions. Specifically, a first dielectric pattern with a first thickness is formed in a first region, and a second dielectric pattern with a second thickness (different from the first) is formed in a second region. This allows local compensation for the steps caused by thickness differences between internal electrodes and dielectric layers, preventing internal electrode bending while maintaining high capacitance through multiple stacked layers.
2Quantity of substance
If dielectric layers are made thinner to stack more layers and increase capacitance, then the capacitance increases, but the step difference between internal electrodes and dielectric layers increases, causing more severe electrode bending and reduced reliability
Solution Approach 1:
The patent uses local quality to address thickness uniformity issues by forming dielectric patterns with varying thicknesses in different regions. This allows the structure to compensate for manufacturing variations and step differences locally, maintaining overall precision even when using thin dielectric layers to increase the number of stacked layers and capacitance.
Solution Approach 2:
The patent applies preliminary action by pre-forming dielectric patterns with specific thicknesses in predetermined regions before final assembly. The first dielectric pattern with a first thickness and the second dielectric pattern with a second thickness are formed in advance to preemptively compensate for expected step differences, preventing internal electrode bending before it occurs during the stacking process.
3Shape
If internal electrodes are bent to fill steps, then the steps are eliminated, but margin portions are reduced and empty spaces are eliminated, causing structural irregular stretching and reduced reliability
Solution Approach 1:
The patent prevents the need for internal electrode bending by locally adjusting the dielectric layer thickness through dielectric patterns. By forming a first dielectric pattern with a first thickness in a first region and a second dielectric pattern with a second thickness in a second region, the patent eliminates steps at their source rather than allowing internal electrodes to bend and fill them, thereby maintaining margin portions and avoiding structural irregular stretching.
Data Source
AI summary
A multilayer ceramic capacitor includes a body including first and second dielectric layers and having first to sixth surfaces; a second internal electrode disposed on the second dielectric layer to face the first internal electrode with the first or second dielectric layer interposed therebetween, exposed to the fourth, fifth, and sixth surfaces, and disposed to be spaced apart from the third surface by a second space; a first dielectric pattern disposed in at least a portion of the first space; a second dielectric pattern disposed in at least a portion of the second space; a side insulating layer disposed on the fifth and sixth surfaces; a first external electrode disposed on the third surface; and a second external electrode disposed on the fourth surface, in which the first and second dielectric patterns have a color different from the first and second dielectric layers.