Multilayer Ceramic Capacitor Electrode Segmentation for ESL and Noise Reduction
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Solution Overview
Problem
Multilayer ceramic capacitors face challenges in miniaturization and high capacitance, leading to increased equivalent series inductance (ESL) and acoustic noise due to vibrations generated by piezoelectric phenomena, which degrade performance and cause discomfort through audible noise.
Innovation Solution
A multilayer ceramic capacitor design with strategically positioned internal and external electrodes, where the distance and length of noise-adjusting portions are optimized to control acoustic noise and reduce ESL, by adjusting the distance between and the length of these electrodes, ensuring a short current path and minimizing vibrations transferred to printed circuit boards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multilayer ceramic capacitors are miniaturized and designed for high capacitance, then capacitance density is improved, but equivalent series inductance increases and performance degrades
Solution Approach 1:
The internal electrodes are divided into multiple segments (first internal electrode with first exposed portions, second internal electrode with third exposed portion) rather than using single continuous electrodes. This segmentation allows optimization of current paths and reduction of ESL while maintaining high capacitance density in the miniaturized structure.
Solution Approach 2:
The patent applies different electrode configurations to different regions of the capacitor. The first internal electrode has multiple exposed portions at specific positions, while the second internal electrode has a third exposed portion positioned differently. This local variation in electrode quality optimizes the current distribution and reduces inductance in critical areas.
2Reliability
If distance between internal electrodes is decreased to reduce ESL, then inductance is reduced, but acoustic noise from piezoelectric vibrations increases
Solution Approach 1:
The patent optimizes specific geometric parameters of the electrode configuration, including the distances (a and b) and lengths (G1 and G2) of the exposed portions. By carefully controlling these parameters within specific ranges, the patent achieves a balance between minimizing ESL and reducing piezoelectric vibrations that cause acoustic noise.
Solution Approach 2:
The patent converts the potentially harmful piezoelectric effect into a beneficial outcome by strategically positioning the internal electrodes. The specific configuration of exposed portions creates controlled stress distribution that reduces overall vibrations and acoustic noise while maintaining the necessary electrical performance.
3Reliability
If internal electrodes are positioned closer to reduce current path length, then ESL is decreased, but manufacturing precision requirements increase
Solution Approach 1:
The patent defines specific parameter ranges for distances (a and b) and lengths (G1 and G2) of the electrode exposed portions. These standardized parameters provide clear manufacturing targets that balance the need for short current paths with achievable manufacturing precision, making the design practical for production.
4Object-generated harmful factors
If electrode configuration is optimized to reduce acoustic noise, then noise is decreased, but device complexity increases
Solution Approach 1:
The internal electrodes are segmented into multiple exposed portions with specific positioning, which reduces acoustic noise by controlling vibration patterns. While this segmentation increases structural complexity compared to simple continuous electrodes, it enables effective noise reduction through controlled stress distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The optimized electrode configuration effectively decreases acoustic noise and ESL, enhancing the reliability and performance of multilayer ceramic capacitors while preventing short-circuit defects, even when mounted on boards, by maintaining a specific ratio of electrode lengths and distances within a defined range.
Implementation Method 1
Since the dielectric layers as above have piezoelectricity and electrostriction, when a direct current or alternating current voltage is applied to multilayer ceramic capacitors, a piezoelectric phenomenon may occur between internal electrodes, such that vibrations may be generated.
Implementation Method 2
Since the dielectric layers as above have piezoelectricity and electrostriction, when a direct current or alternating current voltage is applied to multilayer ceramic capacitors, a piezoelectric phenomenon may occur between internal electrodes, such that vibrations may be generated.
Data Source
AI summary
A multilayer ceramic capacitor may include a ceramic body including a plurality of dielectric layers; a first internal electrode disposed in the ceramic body and exposed to a first side surface in a width direction of the ceramic body and a second internal electrode disposed in the ceramic body and exposed to the first side surface in the width direction of the ceramic body; and first to third external electrodes disposed on the first side surface in the width direction of the ceramic body.