Multilayer Ceramic Capacitor Floating Electrode Asymmetry
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Solution Overview
Problem
Multilayer ceramic capacitors with high voltage and low capacitance characteristics face issues with capacitance value changes during processing, leading to high product wastage and decreased yield, along with conductivity problems due to the limited number of stacked layers and difficulty in securing external electrode connectivity.
Innovation Solution
A multilayer ceramic capacitor design that adjusts the lengths of overlapped portions between floating and internal electrodes using an offset value, without increasing the dielectric layer thickness or the number of internal electrode layers, and includes dummy electrodes to improve connectivity and capacitance adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a floating electrode is fixed in position to implement high voltage and low capacitance characteristics, then the capacitance value can be controlled, but the sheet thickness must be changed to satisfy capacitance requirements, leading to product wastage and decreased yield
Solution Approach 1:
The patent changes the geometric parameters of the floating electrode (lengths of overlapped portions with internal electrodes) to precisely control capacitance values without changing sheet thickness or the number of stacked layers. This allows capacitance adjustment while maintaining consistent manufacturing parameters, reducing product wastage and improving yield
2Quantity of substance
If the number of stacked layers is reduced to achieve low capacitance, then the capacitance value decreases, but the connectivity of external electrodes becomes difficult to secure, deteriorating conductivity and increasing ESR
Solution Approach 1:
The patent creates different overlapped portion lengths between the floating electrode and internal electrodes, creating asymmetric local structures. This allows the floating electrode to provide multiple connection points to external electrodes even with fewer stacked layers, maintaining conductivity and low ESR while achieving the required low capacitance value
3Ease of manufacture
If the overlapped portions between floating electrode and internal electrodes are made equal in length, then the structure is simple to manufacture, but the capacitance value cannot be finely adjusted without changing dielectric layer thickness or number of stacked layers
Solution Approach 1:
The patent deliberately creates asymmetric overlapped portions between the floating electrode and internal electrodes, with different lengths on each side. This asymmetric design enables precise control of capacitance values by adjusting the overlap lengths independently, achieving fine capacitance adjustment while maintaining a relatively simple manufacturing process
Data Source
AI summary
There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers, first and second external electrodes; first and second internal electrodes formed to be spaced apart from each other; and a first floating electrode disposed alternately with the first and second internal electrodes in the ceramic body in a thickness direction and having both end portions thereof overlapped with the first and second internal electrodes, respectively, wherein the first floating electrode is disposed so that a length of portion of the first internal electrode overlapped with one end portion of the first floating electrode and a length of portion of the second internal electrode overlapped with the other end portion of the first floating electrode in the ceramic body are different.


