Multilayer Ceramic Capacitor Floating Electrode Voltage Distribution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge lies in achieving high capacitance and high voltage in multilayer ceramic capacitors while maintaining reliable dielectric breakdown voltage, as increasing the number of internal electrodes for higher capacitance reduces dielectric breakdown voltage, and increasing the dielectric layer thickness for voltage reduces the number of internal electrodes, making it difficult to achieve both high capacitance and high voltage simultaneously.
Innovation Solution
Incorporating a floating pattern with overlapping portions between conductive patterns within the ceramic body, which reduces the voltage acting on internal electrodes, allowing for increased capacitance without compromising dielectric breakdown voltage, by alternately stacking internal electrodes and ceramic layers with a floating electrode that covers gaps between them.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of multilayered internal electrodes is increased to achieve high capacitance, then capacitance is improved, but the distance between electrodes is reduced and dielectric breakdown voltage is lowered
Solution Approach 1:
A floating electrode is introduced as an intermediary element between the positive and negative internal electrodes. This floating electrode does not connect to external terminals but is positioned within the ceramic body to redistribute electric fields and reduce stress concentration at electrode edges, thereby preventing dielectric breakdown while maintaining high capacitance through increased electrode layers
Solution Approach 2:
The patent optimizes the thickness of the dielectric layer within specific ranges (1-10 μm for X7R material) and controls the ratio of electrode area to ceramic body dimensions. By precisely controlling these parameters and using high-permittivity ceramic materials, the patent achieves high capacitance without proportionally increasing the number of electrode layers, thus maintaining adequate breakdown voltage
2Reliability
If the thickness of the dielectric layer is increased to improve withstand voltage, then dielectric breakdown voltage is improved, but the number of internal electrodes is reduced
Solution Approach 1:
The patent employs composite ceramic materials with high permittivity (such as X7R, Y5V, or Z5U temperature characteristic ceramics) that provide both high breakdown voltage and high capacitance density. These composite materials allow thinner dielectric layers to achieve the same voltage resistance while enabling more electrode layers to be stacked, thus resolving the contradiction between withstand voltage and electrode count
Solution Approach 2:
Instead of solely increasing dielectric layer thickness in one dimension to improve voltage resistance, the patent utilizes the floating electrode structure that extends in multiple dimensions within the ceramic body. This three-dimensional electrode arrangement allows voltage distribution optimization without being constrained by simple linear thickness increases, enabling both high voltage and high capacitance
Data Source
AI summary
There is provided a high voltage and high capacitance multilayer ceramic electronic component having enhanced reliability, including: a ceramic body; a first layer including conductive patterns; and a second layer including a floating pattern, wherein the sum of the number of the first and second layers is 100 or more, the ceramic body has first and second external electrodes formed on outer surfaces thereof, and a ratio of a length of the floating pattern to a length of the ceramic body is 0.7 to 0.9, and a ratio of a length of the overlapped portion to the length of the floating pattern is 0.5 to 0.95, in a cross section taken in a length direction in which the first and second external electrodes are connected to and extended from the ceramic body and a stacking direction of the first and second layers.