Multilayer Ceramic Capacitor Grain Gradient for Moisture Resistance

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Solution Overview

Problem

The miniaturization and increased capacitance of multilayer ceramic capacitors lead to a reduction in the volume of non-electrode regions, compromising moisture resistance and anti-fracture strength.

Innovation Solution

The design includes a multilayer ceramic capacitor with internal electrode layers having a wider opposing portion and a narrower lead-out portion, with specific grain size gradients and void distributions to enhance structural integrity and moisture resistance, and the lead-out portions are deviated from each other in the width direction to prevent short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the multilayer ceramic capacitor is miniaturized and increased in capacitance, then the size of the capacitor is reduced and capacitance is increased, but the volume of the region other than the internal electrode layer becomes smaller, compromising moisture resistance and anti-fracture strength

Engineering Contradiction:
Improvesize of capacitorVSAvoidmoisture resistance and anti-fracture strength
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by creating a grain size gradient in the dielectric layers, where the grain size varies from the center toward the outer periphery in the width direction. Specifically, the grain size is smaller at the outer peripheral portion compared to the central portion, which reinforces the structure at the vulnerable edges where moisture typically penetrates, thereby improving moisture resistance and anti-fracture strength without increasing overall capacitor size.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the internal electrode layers are increased in size to maintain capacitance in miniaturized capacitors, then the capacitance is maintained, but the volume of non-electrode regions decreases, weakening structural integrity

Engineering Contradiction:
ImprovecapacitanceVSAvoidstructural integrity
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

The patent implements local quality through spatial variation of grain size within the dielectric layers. The grain size is controlled to be smaller at the outer peripheral portions and larger toward the center, creating localized reinforcement at the edges where structural integrity is most critical. This gradient structure maintains overall capacitance while strengthening vulnerable regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite material principles by creating a heterogeneous microstructure within the dielectric layers through the grain size gradient. The dielectric layer comprises regions with different grain sizes, forming a composite structure that optimizes both electrical properties (capacitance) and mechanical properties (strength and moisture resistance) in different spatial zones.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20250014831A1Multilayer ceramic capacitor
Publication Date: 2025.01.09 MURATA MFG CO LTD
  • US20250014831A1 patent drawing
  • US20250014831A1 patent drawing
  • US20250014831A1 patent drawing

AI summary

A multilayer ceramic capacitor includes an element body portion including dielectric layers and internal electrode layers including Ni laminated in a thickness direction. In the internal electrode layers, a width of an opposing portion is larger than a width of a lead-out portion. The element body portion includes first, second, and third regions in order from an inside to an outside in the width direction in each of a region from an end portion on one side of the lead-out portion in the width direction to the first side surface and a region from an end portion on another side of the lead-out portion to the second side surface. When grain sizes of dielectrics included in the first, second, and third regions are respectively defined as gr1, gr2, and gr3, a relationship of gr1<gr2<gr3 is satisfied.