Multilayer Ceramic Capacitor Lateral Electrode Design for Noise Cancellation

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Solution Overview

Problem

Multilayer ceramic capacitors (MLCCs) face challenges in achieving high capacitance and mounting density while effectively canceling high-frequency noise, with equivalent series resistance (ESR) and equivalent series inductance (ESL) components affecting their performance as bypass capacitors in electronic devices.

Innovation Solution

A multilayer ceramic capacitor design featuring a ceramic body with internal electrodes having an overlap region, an insulating layer covering the lead out portions, and external electrodes formed on the lateral surface, where the thickness ratio of the insulating layer to the external electrodes is optimized between 1.10 and 1.30, enhancing capacitance and mounting density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the MLCC is designed with compact dimensions to increase mounting density, then the mounting density is improved, but the capacitance and noise canceling function are reduced

Engineering Contradiction:
Improvemounting densityVSAvoidcapacitance
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent transitions from conventional bottom-electrode configurations to lateral surface electrode arrangements, utilizing the side surfaces of the ceramic body for electrode placement. This dimensional reconfiguration allows for optimized electrical pathways and improved capacitance within compact form factors, effectively resolving the contradiction between small size and sufficient capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the MLCC is designed with compact dimensions to increase mounting density, then the mounting density is improved, but the high frequency noise canceling function is reduced

Engineering Contradiction:
Improvemounting densityVSAvoidhigh frequency noise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent optimizes the thickness ratio parameter (B/A) of external electrodes to insulating layer between 1.10 and 1.30, and adjusts the overlap area of internal electrodes, to minimize equivalent series inductance (ESL). These parameter changes enable effective high-frequency noise cancellation while maintaining compact dimensions suitable for high mounting density applications.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the thickness of external electrodes is increased to improve electrical connection, then the electrical connection is improved, but the mounting stability is reduced

Engineering Contradiction:
Improveelectrical connectionVSAvoidmounting stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent establishes an optimal thickness ratio range (B/A = 1.10 to 1.30) for external electrodes relative to the insulating layer. This parameter optimization ensures sufficient electrical conductivity and connection reliability while preventing excessive electrode thickness that would cause protrusion and mounting instability, thereby resolving the contradiction between electrical connection quality and mounting stability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9001491B2Multilayer ceramic capacitor and circuit board with multilayer ceramic capacitor mounted thereon
Publication Date: 2015.04.07 SAMSUNG ELECTRO MECHANICS CO LTD
  • US9001491B2 patent drawing
  • US9001491B2 patent drawing
  • US9001491B2 patent drawing

AI summary

A multilayer ceramic capacitor includes a ceramic body having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another. First and second internal electrodes have an overlap region with lead out portions exposed to the first lateral surface of the ceramic body. An insulating layer is formed to cover the overlap region of the lead out portions exposed to the first lateral surface of the ceramic body; and first and second external electrodes are formed on the first lateral surface of the ceramic body on which the insulating layer is formed and electrically connected to the first and second internal electrodes. Thicknesses of the insulating layer from the first lateral surface and the first and second external electrodes from the first lateral surface are specified.