Multilayer Ceramic Capacitor Structure for Layer Peeling Resistance
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Solution Overview
Problem
Multilayer ceramic capacitors experience layer peeling due to insufficient mechanical bonding force between the inner and outer layer portions when subjected to mechanical stress.
Innovation Solution
The multilayer ceramic capacitor design includes a multilayer body with specific segregation of silicon and magnesium on the outermost internal electrode layer, resulting in a larger line edge roughness on the outer layer side, which enhances the mechanical bonding between the inner and outer layer portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional multilayer structure is used with standard bonding between inner and outer layers, then manufacturing is simple, but mechanical bonding force is insufficient causing layer peeling under stress
Solution Approach 1:
The patent applies local quality by creating asymmetric line edge roughness at specific locations. The outer layer side of the outermost internal electrode layer is designed with larger line edge roughness compared to the inner layer side, concentrating the bonding enhancement effect where it is most needed at the interface between outer and inner layer portions while maintaining simplicity elsewhere in the structure.
Solution Approach 2:
The patent changes physical parameters by controlling the line edge roughness magnitude and asymmetry. By adjusting the segregation amount of silicon and magnesium and the resulting line edge roughness parameters (with outer layer side roughness larger than inner layer side roughness), the mechanical bonding force is enhanced without fundamentally changing the overall multilayer structure or requiring additional components.
2Strength
If segregation of silicon and magnesium is controlled to increase line edge roughness on outer layer side, then mechanical bonding is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent uses parameter changes by controlling the segregation amount of silicon and magnesium during the sintering process. This chemical composition control translates into physical line edge roughness characteristics, achieving the desired asymmetric surface profile through material composition adjustment rather than complex mechanical or post-processing methods.
Solution Approach 2:
The invention applies local quality by creating different line edge roughness characteristics at different locations of the same internal electrode layer. The outer layer side is engineered to have larger roughness while the inner layer side maintains smaller roughness, allowing localized bonding enhancement without requiring uniform changes throughout the entire structure or excessive manufacturing precision across all regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces or prevents layer peeling under mechanical stress, ensuring the reliability and durability of the capacitor.
Implementation Method 1
a segregation amount of silicon and magnesium on an outer layer side of the outermost internal electrode layer is larger than a segregation amount of silicon and magnesium on an inner layer side of the outermost internal electrode layer
Implementation Method 2
a line edge roughness A of an outer layer side of a first region is larger than a line edge roughness B of an inner layer side of the first region
Data Source
AI summary
In a multilayer ceramic capacitor, a segregation amount of silicon and magnesium on an outer layer side of an outermost internal electrode layer is larger than a segregation amount of silicon and magnesium on an inner layer side of the outermost internal electrode layer, and when a region defined by an existence region of the outermost internal electrode layer and a segregation region of silicon and magnesium in contact with the outermost internal electrode layer is defined as a first region, a line edge roughness of an outer layer side of the first region is larger than a line edge roughness of an inner layer side of the first region.


