Multilayer Ceramic Capacitor Lower Cover Layer Design

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Multilayer ceramic capacitors generate acoustic noise due to piezoelectric vibrations, and increasing the thickness of the lower cover layer to mitigate this can lead to delamination issues, particularly at the boundary surface and longitudinal margin portions.

Innovation Solution

A multilayer ceramic capacitor design with a lower cover layer thicker than the upper cover layer, featuring alternately exposed dummy electrode terminals in the lower cover layer, which reduces delamination and noise by controlling the thickness ratios and deformation rates when voltage is applied.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the thickness of the lower cover layer is increased to reduce acoustic noise, then the acoustic noise is reduced, but delamination occurs at the boundary surface between the active layer and the lower cover layer

Engineering Contradiction:
Improveacoustic noiseVSAvoiddelamination resistance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by creating a transition region in the lower cover layer where the thickness gradually changes from the active layer thickness to the maximum lower cover layer thickness. This gradual transition prevents sudden thickness changes that cause delamination, while still maintaining the increased thickness needed for noise reduction in the longitudinal margin portions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The lower cover layer is segmented into different thickness regions: a first lower cover layer portion with thickness equal to the active layer thickness (preventing delamination at the boundary), and second lower cover layer portions with greater thickness (reducing acoustic noise). This segmentation allows simultaneous achievement of both noise reduction and delamination prevention.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces acoustic noise while preventing delamination, maintaining capacitance integrity by controlling the thickness ratios and deformation rates within specific ranges, thereby enhancing the reliability of the multilayer ceramic capacitors.

Implementation Method 1

Since these dielectric layers have piezoelectricity properties and electrostrictive properties, a piezoelectric phenomenon may occur and thus cause vibrations between the internal electrodes when AC or DC voltage is applied to the multilayer ceramic capacitor

Methodology Applied
Scientific EffectPiezoelectric phenomenon: Piezoelectric Effect

Implementation Method 2

Since these dielectric layers have piezoelectricity properties and electrostrictive properties, a piezoelectric phenomenon may occur and thus cause vibrations between the internal electrodes when AC or DC voltage is applied to the multilayer ceramic capacitor

Methodology Applied
Scientific EffectElectrostriction: Electrostriction

Data Source

PatentUS9646770B2Multilayer ceramic capacitor and mounting board for multilayer ceramic capacitor
Publication Date: 2017.05.09 SAMSUNG ELECTRO MECHANICS CO LTD
  • US9646770B2 patent drawing
  • US9646770B2 patent drawing
  • US9646770B2 patent drawing

AI summary

There is provided multilayer ceramic capacitor including, a ceramic body including a plurality of dielectric layers laminated therein, an active layer including a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, with the dielectric layers interposed therebetween, and having capacitance formed therein, an upper cover layer formed on an upper portion of the active layer, a lower cover layer formed on a lower portion of the active layer and having a thickness greater than that of the upper cover layer, first and second dummy electrode terminals provided in the lower cover layer to be alternately exposed through both end surfaces of the lower cover layer, and first and second external electrodes covering the both end surfaces of the ceramic body.