Multilayer Ceramic Capacitor Lower Cover Layer Thickness Optimization
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Solution Overview
Problem
Multilayer ceramic capacitors (MLCCs) generate acoustic noise due to vibrations when mounted on printed circuit boards, and increasing the thickness of the lower cover layer to reduce noise can lead to delamination defects and degradation of breakdown voltage.
Innovation Solution
The MLCC design includes a ceramic body with laminated dielectric layers, an active layer with internal electrodes, and cover layers where the lower cover layer is thicker than the upper cover layer, with specific ratios of thicknesses to minimize strain differences and reduce acoustic noise, while preventing delamination and maintaining capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the thickness of the lower cover layer is increased to reduce acoustic noise, then acoustic noise is reduced, but delamination defects occur and breakdown voltage degrades
Solution Approach 1:
The invention optimizes the thickness of the lower cover layer within a specific range (0.05mm to 0.15mm) to reduce acoustic noise while preventing delamination. This parameter optimization resolves the contradiction by finding the optimal thickness value that achieves noise reduction without causing structural defects.
Solution Approach 2:
The invention uses a composite structure with the lower cover layer made of dielectric material having specific physical properties (dielectric constant, loss tangent) that differ from the active layer. This material composition optimization allows the lower cover layer to dampen vibrations and reduce acoustic noise while maintaining structural integrity and preventing delamination.
2Object-affected harmful factors
If the thickness of the lower cover layer is increased to reduce acoustic noise, then acoustic noise is reduced, but breakdown voltage degrades
Solution Approach 1:
The invention optimizes the thickness of the lower cover layer within a specific range (0.05mm to 0.15mm) to reduce acoustic noise while maintaining breakdown voltage. This parameter optimization resolves the contradiction by finding the optimal thickness value that achieves noise reduction without compromising electrical strength.
Solution Approach 2:
The invention specifies dielectric materials with particular properties (dielectric constant between 2.0-5.0, loss tangent between 0.02-0.05) for the lower cover layer. These material properties enable effective vibration damping for noise reduction while maintaining high breakdown voltage through superior dielectric strength.
3Object-affected harmful factors
If the thickness of the lower cover layer is increased to reduce acoustic noise, then acoustic noise is reduced, but capacitance decreases
Solution Approach 1:
The invention optimizes the thickness of the lower cover layer within a specific range (0.05mm to 0.15mm) to reduce acoustic noise while maintaining capacitance. This parameter optimization resolves the contradiction by finding the optimal thickness value that achieves noise reduction without significantly reducing the capacitance of the capacitor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces acoustic noise to less than 20 dB, prevents cracks and delamination, and maintains the required capacitance by optimizing the thickness ratios of the cover layers and active layer within the MLCC.
Implementation Method 1
The dielectric layers have piezoelectric and electrostrictive properties. Thus, when a DC or AC voltage is applied to an MLCC, a piezoelectric phenomenon occurs between internal electrodes, generating vibrations.
Implementation Method 2
The dielectric layers have piezoelectric and electrostrictive properties. Thus, when a DC or AC voltage is applied to an MLCC, a piezoelectric phenomenon occurs between internal electrodes, generating vibrations.
Data Source
AI summary
A multilater ceramic capacitor includes: a ceramic body in which a plurality of dielectric layers are laminated; and an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layer interposed therebetween, and forming capacitance. An upper cover layer is formed on an upper portion of the active layer; a lower cover layer is formed on a lower portion of the active layer and having a thickness greater than that of the upper cover layer. First and second external electrodes cover both end surfaces of the ceramic body. Specific sizing of ceramic body and electrodes is defined.