Multilayer Ceramic Capacitor Noise Reduction via Geometric Ratios
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Solution Overview
Problem
Multilayer ceramic capacitors generate significant acoustic noise due to piezoelectric properties, which can be exacerbated by increased capacitance, and existing methods to reduce noise either compromise bonding strength or require complex mounting direction adjustments, while also being prone to radiating cracks during the sintering process of external electrodes.
Innovation Solution
A multilayer ceramic capacitor design with specific geometric ratios for its components, including a ceramic body with alternately stacked internal electrodes, cover layers, and external electrodes, which allows for reduced acoustic noise and suppressed radiating cracks, regardless of mounting direction, by optimizing the thickness and width ratios of these components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacitance of the multilayer ceramic capacitor is increased, then the capacitance value is improved, but the acoustic noise is increased
Solution Approach 1:
The patent applies parameter changes by optimizing the thickness of the cover layer and the width of the band part of the external electrode within specific ranges. These geometric parameter adjustments reduce mechanical deformation of the dielectric layer while maintaining high capacitance, thereby resolving the contradiction between increased capacitance and reduced acoustic noise.
2Object-generated harmful factors
If the amount of solder used to bond the board and the multilayer ceramic capacitor is decreased, then the acoustic noise is reduced, but the bonding strength is decreased
Solution Approach 1:
The patent extracts the noise reduction function from the solder amount and transfers it to the structural design of the capacitor itself. By optimizing the cover layer thickness and external electrode geometry, the capacitor structure itself reduces acoustic noise generation, eliminating the need to reduce solder amount for noise control while maintaining adequate bonding strength.
3Object-generated harmful factors
If the multilayer ceramic capacitor is mounted in a specific direction to control acoustic noise, then the acoustic noise is reduced, but the mounting process complexity is increased
Solution Approach 1:
The patent introduces asymmetry in the geometric parameters of the cover layer and external electrode to create an isotropic noise reduction effect. This asymmetric design ensures that acoustic noise is reduced regardless of the mounting direction, eliminating the need for separate alignment processes and reducing mounting complexity.
4Strength
If the external electrodes are sintered after electrode formation, then the electrode adhesion is improved, but radiating cracks occur due to stress
Solution Approach 1:
The patent applies beforehand cushioning by designing the cover layer with specific thickness and the external electrode with specific width ratios that cushion and distribute the thermal stress during the sintering process. This preventive structural design reduces stress concentration that would otherwise cause radiating cracks, while still achieving adequate electrode adhesion through the sintering process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively decreases acoustic noise to a uniform level regardless of mounting orientation and prevents radiating cracks, maintaining adequate capacitance and adhesion strength, thus improving the capacitor's performance and reliability.
Implementation Method 1
Since the dielectric layer has piezoelectric and electrostrictive properties, a piezoelectric phenomenon occurs between the internal electrodes when a direct current (DC) or alternating current (AC) voltage is applied to the multilayer ceramic capacitor, such that vibrations may be generated.
Implementation Method 2
Since the dielectric layer has piezoelectric and electrostrictive properties, a piezoelectric phenomenon occurs between the internal electrodes when a direct current (DC) or alternating current (AC) voltage is applied to the multilayer ceramic capacitor, such that vibrations may be generated.
Implementation Method 3
Meanwhile, in the multilayer ceramic capacitor, external electrodes are formed on the sintered ceramic body and then a process for sintering the external electrodes is performed.
Data Source
AI summary
A multilayer ceramic capacitor may include: an active part including a plurality of first and second internal electrodes; upper and lower cover layers; and first and second external electrodes including head parts and band parts. When a thickness of the upper or lower cover layer is defined as C, a width of a margin portion of the ceramic body in a width direction is defined as M, a cross-sectional area of the ceramic body in a width-thickness direction is defined as Ac, a cross-sectional area of the active part in a width-thickness direction in a portion thereof in which the first and second internal electrodes are overlapped with each other in a thickness direction is defined as Aa, and a width of the band part of the first or second external electrode is defined as B, 1.826≦C/M≦4.686, 0.2142≦Aa/Ac≦0.4911, and 0.5050≦C/B≦0.9094 may be satisfied.