Multilayer Ceramic Capacitor Side Margin Pore Reduction

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Solution Overview

Problem

The miniaturization of multilayer ceramic capacitors to achieve high capacitance results in reliability issues due to pore generation at the interface between the ceramic body and side margin portions, leading to compromised moisture resistance and sintering compactness.

Innovation Solution

A multilayer ceramic capacitor design with side margin portions divided into regions of varying dielectric grain sizes and magnesium content, where the region adjacent to the internal electrodes has a lower pore density and higher magnesium content to enhance moisture resistance and compactness, while maintaining a thin thickness to maximize capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the internal electrodes are exposed in the width direction to maximize electrode area, then capacitance is increased, but pores are generated at the interface between ceramic body and side margin portion, deteriorating reliability

Engineering Contradiction:
Improveeffective area of electrodeVSAvoidmoisture resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The side margin portion is divided into a first region and a second region with different dielectric grain sizes and magnesium content. The second region adjacent to the interface has finer grains and higher magnesium content to reduce pore formation and improve moisture resistance, while the first region maintains the original properties for capacitance performance.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the side margin portion is attached in a pre-sintering operation, then electrode area is maximized, but a large amount of pores are generated at the interface, deteriorating reliability

Engineering Contradiction:
Improvearea of internal electrodesVSAvoidsintering compactness
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The dielectric grain size and magnesium content parameters are varied across different regions of the side margin portion. The second region has smaller grain size and higher magnesium content to achieve better sintering compactness and reduce pores at the critical interface area.

Inventive Principle:
Principle #35Parameter changes

3Volume of moving object

If the multilayer ceramic capacitor is miniaturized, then high capacitance is achieved, but pores are generated at the interface, compromising moisture resistance

Engineering Contradiction:
Improvesize of capacitorVSAvoidmoisture resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

In the miniaturized capacitor structure, the side margin portion uses localized quality variation with a second region containing finer dielectric grains and higher magnesium content specifically at the interface area to prevent pore formation and maintain moisture resistance despite the reduced overall size.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves the reliability of multilayer ceramic capacitors by reducing pore density and enhancing moisture resistance, ensuring high capacitance and mechanical strength, thereby addressing the challenges of miniaturization and reliability.

Implementation Method 1

a first ceramic green sheet having a plurality of first internal electrode patterns formed at predetermined intervals, and a second ceramic green sheet having a plurality of second internal electrode patterns formed at predetermined intervals; forming a ceramic green sheet stacked body by stacking the first ceramic green sheet and the second ceramic green sheet

Methodology Applied
Scientific EffectSintering: Sintering

Data Source

PatentUS11170936B2Multilayer ceramic capacitor and method of manufacturing the same
Publication Date: 2021.11.09 SAMSUNG ELECTRO MECHANICS CO LTD
  • US11170936B2 patent drawing
  • US11170936B2 patent drawing
  • US11170936B2 patent drawing

AI summary

A multilayer ceramic capacitor includes a ceramic body including a dielectric layer, a plurality of internal electrodes disposed in the ceramic body, and a first side margin portion and a second side margin portion respectively arranged on end portions of the internal electrodes exposed from first and second surfaces. The first and second side margin portions respectively include a first region adjacent to an outer side surface of each of the side margin portions, and a second region adjacent to the internal electrodes exposed from the first and second surfaces. The number of pores per unit area in the second region is less than the number of pores per unit area in the first region.