Multilayer Ceramic Capacitor Strain Dispersion for Acoustic Noise Reduction
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Solution Overview
Problem
Multilayer ceramic capacitors (MLCCs) mounted on printed circuit boards (PCBs) generate acoustic noise due to vibrations caused by piezoelectric phenomena, which existing solutions like increasing the thickness of the lower cover layer only partially address, and further research is needed to reduce this noise effectively.
Innovation Solution
A multilayer ceramic capacitor design with a ceramic body having alternately laminated first and second internal electrodes, where the active layer includes regions with different polarity internal electrodes to form and not form capacitance, and a thicker lower cover layer than upper cover layer, optimizing the thickness ratios to minimize strain differences and create a point of inflection, thereby reducing acoustic noise when mounted on a PCB.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the thickness of the lower cover layer is increased, then acoustic noise is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The active layer is segmented into multiple blocks (first block, second block, third block, fourth block) with different internal electrode configurations. This segmentation allows different regions to have different functions: some regions form capacitance while others do not, thereby dispersing strain and reducing acoustic noise without requiring excessive increase in lower cover layer thickness
Solution Approach 2:
Different regions of the active layer are given different local qualities through varied internal electrode arrangements. Regions with internal electrodes of different polarities form capacitance, while regions with same-polarity electrodes do not form capacitance. This local differentiation optimizes the balance between capacitance performance and acoustic noise reduction
2Object-affected harmful factors
If the thickness ratio between lower and upper cover layers is optimized, then acoustic noise is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The invention optimizes specific parameter ranges for thickness ratios: the lower cover layer thickness to active layer thickness ratio is controlled at 0.329-1.522, and the upper to lower cover layer thickness ratio is controlled at 0.021-0.422. These parameter optimizations reduce acoustic noise while providing clear manufacturing targets that balance precision requirements with noise reduction effectiveness
3Object-affected harmful factors
If internal electrodes are arranged to disperse strain, then acoustic noise is reduced, but capacitance formation may be affected
Solution Approach 1:
The active layer is divided into multiple blocks where some regions contain internal electrodes configured to form capacitance, while other regions contain internal electrodes that do not form capacitance. This segmentation allows the capacitor to maintain adequate capacitance performance while dispersing strain through the non-capacitance-forming regions, thereby reducing acoustic noise
Solution Approach 2:
Different local regions are assigned different functional qualities: capacitance-forming regions maintain high dielectric constant materials and appropriate electrode spacing for capacitance, while non-capacitance regions are designed to minimize strain concentration. This local quality differentiation ensures both capacitance performance and acoustic noise reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces acoustic noise to less than 20 dB by dispersing strain and contraction/expansion effects across the ceramic body, maintaining effective capacitance and preventing defects, as demonstrated by the specified thickness ratios and experimental results.
Implementation Method 1
The dielectric layers have piezoelectric and electrostrictive properties. Thus, when a direct current (DC) or alternating current (AC) voltage is applied to an MLCC, a piezoelectric phenomenon occurs between internal electrodes, generating vibrations.
Implementation Method 2
the active layer includes a first block in which a first region I formed to one side based on a central portion R of the ceramic body in the length direction... and a second block in which a third region III formed on the other side based on the central portion R... Due to a difference between strain generated in the central portion of the active layer and that generated in the lower cover layer during the application of voltage, a point of inflection (PI) formed in both end portions of the ceramic body may be formed below the central portion of the ceramic body in the thickness direction.
Data Source
AI summary
There is provided a multilayer ceramic capacitor including: a ceramic body; an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body, disposed vertically on upper and lower surfaces of the ceramic body and forming capacitance; an upper cover layer formed upwardly of the active layer; a lower cover layer formed downwardly of the active layer and having a thickness greater than that of the upper cover layer; and first and second external electrodes covering both end surfaces of the ceramic body, wherein the active layer includes a first block in which a first region I and a second region II formed, and a second block in which a third region III, and a fourth region IV formed.