Multilayer Ceramic Capacitor Void Structure for Insulation Reliability

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Solution Overview

Problem

Existing technologies have not adequately addressed the need for reducing insulation resistance degradation and improving the reliability of multilayer ceramic capacitors with increased electrostatic capacitance and reduced size.

Innovation Solution

A multilayer ceramic capacitor design that includes dielectric particles with controlled intragranular voids and specific void density and particle diameter ratios in the inner and side margin portions, enhancing insulation resistance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If dielectric layers are made thinner to increase volumetric capacitance, then electrostatic capacitance per unit volume increases, but insulation resistance degradation worsens

Engineering Contradiction:
Improvevolumetric capacitanceVSAvoidinsulation resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by introducing intragranular voids specifically in the side margin portions of the capacitor, while maintaining different void density ranges for inner-layer portions versus side margin portions. This localized structural modification allows the side margins to provide protective insulation without compromising the overall compact design and volumetric capacitance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes porous materials by incorporating dielectric particles with intragranular voids (internal pores) in specific regions. The side margin portions contain dielectric particles with 5-20 vol% intragranular voids, creating a porous structure that enhances insulation resistance and reliability while maintaining the thin-layer design for high volumetric capacitance.

Inventive Principle:
Principle #31Porous materials

2Quantity of substance

If the number of stacked layers is increased to maximize capacitance, then electrostatic capacitance increases, but device complexity increases

Engineering Contradiction:
Improveelectrostatic capacitanceVSAvoidnumber of stacked layers
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies local quality by differentiating the intragranular void density between inner-layer portions (0-5 vol%) and side margin portions (5-20 vol%). This localized differentiation allows optimization of each region's function: inner layers maximize capacitance through thinning, while side margins provide insulation protection, thereby managing device complexity through functional zoning.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If outer-layer portions and side margin portions are reduced in volume to increase volumetric capacitance, then volumetric capacitance increases, but protective function deteriorates

Engineering Contradiction:
Improvevolumetric capacitanceVSAvoidprotective function
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent utilizes porous materials by introducing intragranular voids in the side margin portions (5-20 vol%), creating a porous dielectric structure that provides enhanced insulation resistance and protective function. This allows the side margin portions to maintain adequate protective capabilities even when their volume is reduced to increase volumetric capacitance.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The patent applies local quality by creating a gradient in intragranular void density, with higher void density (5-20 vol%) in side margin portions compared to inner-layer portions (0-5 vol%). This localized structural optimization ensures that reduced-volume side margins still provide sufficient protective function while maximizing the overall volumetric capacitance of the capacitor.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250385046A1Multilayer ceramic capacitor
Publication Date: 2025.12.18 MURATA MFG CO LTD
  • US20250385046A1 patent drawing
  • US20250385046A1 patent drawing
  • US20250385046A1 patent drawing

AI summary

A multilayer ceramic capacitor includes an inner-layer portion, first and second outer-layer portions, and first and second side margin portions. Dielectric particles of each of ceramic dielectrics of the inner-layer portion, and the first and second side margin portions include a void. An intragranular void density in a middle portion of the inner-layer portion (inner-layer middle portion) (N [inner-layer middle portion]) and intragranular void densities in the first and second side margin portions (N [side margin portion]) satisfy N [inner-layer middle portion]<N [side margin portion]. A D50 diameter of dielectric particles in an end portion of the inner-layer portion (inner-layer W-end portion) (D5 [(inner-layer W-end portion) and a D50 diameter of dielectric particles in a middle portion of the inner-layer portion (inner-layer middle portion) (D50 [inner-layer middle portion]) satisfy about 1.00≤D50 [inner-layer W-end portion]/D50 [inner-layer middle portion]≤about 1.40.