Multi-Stage MMIC Amplifier with Parallel FET Noise Shaping
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Solution Overview
Problem
Conventional low noise amplifiers face challenges in adequately mitigating noise, maintaining consistent gain over a range of frequencies, and reducing signal distortion and thermal noise.
Innovation Solution
The use of field effect transistors (FETs) connected in a parallel configuration within a monolithic millimeter or microwave integrated circuit (MMIC) to form amplification stages, allowing for optimized noise figure, gain, and return loss performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If gain of amplifier is increased beyond threshold level, then amplification capability is improved, but signal distortion and noise increase
Solution Approach 1:
The amplifier is divided into multiple stages, each contributing a portion of the total gain. This segmentation allows the overall amplification capability to be high while each individual stage operates within linear regions, avoiding signal distortion and excessive noise generation.
2Power
If conventional LNA design is used, then basic amplification is achieved, but noise figure performance is inadequate
Solution Approach 1:
Different stages of the amplifier are designed with different transistor configurations and biasing conditions optimized for their specific functions. The first stage uses specific FET parameters optimized for minimum noise figure, while subsequent stages are optimized for gain and bandwidth, achieving superior overall noise performance.
3Device complexity
If single-stage amplifier design is used, then circuit simplicity is maintained, but gain consistency over frequency range is poor
Solution Approach 1:
Each amplifier stage is designed with specific bandwidth characteristics and frequency responses. By cascading stages with complementary frequency responses, the overall amplifier achieves flat gain across a broad frequency range, with each stage dynamically contributing to different portions of the spectrum.
4Power
If amplifier gain is increased, then signal strength is improved, but signal to noise ratio deteriorates
Solution Approach 1:
The first amplifier stage is specifically designed and biased to provide the lowest possible noise figure before subsequent gain stages are applied. This preliminary low-noise amplification ensures that weak signals are boosted above the noise floor of subsequent stages, preserving the signal-to-noise ratio while achieving high overall gain.
Data Source
AI summary
The present disclosure is directed to low noise amplifiers built as a monolithic millimeter or microwave integrated circuit (MMIC) that includes an amplification stage with two or more field effect transistors (FETS) connected in a parallel configuration. An amplifier may include two, three, or more amplification stages. Amplifiers consistent with the present disclosure may operate at frequencies in the range of 3 gigahertz (GHz) to 9 GHz. Each transistor or amplification stage may include their own series feedback element. A second amplification stage may include two parallel transistors, with one having a series feedback element and a feedback shunt spanning the second stage. A third stage may include a single transistor. Each of the transistors connected in a parallel configuration may be tuned to a different corner frequency in order to improve metrics of noise figure, gain, input return loss, and output return loss not possible with conventional amplifier designs.