MMIC FET Gate and MIM Capacitor Electrode Integration

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Solution Overview

Problem

Conventional microwave monolithic integrated circuits (MMICs) using compound semiconductor substrates require separate manufacturing processes for active and passive elements, leading to increased manufacturing steps and reduced throughput.

Innovation Solution

The integration of a field effect transistor (FET) and a metal-insulator-metal (MIM) capacitor on the same semiconductor substrate, where the gate electrode of the FET and the lower electrode of the MIM capacitor share a common structure, utilizing a Schottky metal electrode and a laminated metal layer with a barrier metal layer for improved heat resistance and adhesion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate manufacturing processes are used for FET and MIM capacitor, then different metallic materials can be used for each electrode, but the number of manufacturing steps increases and throughput decreases

Engineering Contradiction:
Improveelectrode material compatibilityVSAvoidmanufacturing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges the formation of the FET gate electrode and MIM capacitor lower electrode into a single simultaneous manufacturing step. By designing the gate electrode and lower electrode with the same multi-layer metallic structure (Ti/Pt/Au), both electrodes are formed together in one process, eliminating the need for separate manufacturing steps and improving throughput while maintaining material compatibility

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If the same metallic material is used for both gate electrode and lower electrode, then manufacturing steps are reduced, but the electrodes must satisfy different functional requirements

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidelectrode function adaptability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent applies universality by designing a multi-layer metallic structure (Ti/Pt/Au) that serves multiple functions simultaneously. The Ti layer provides adhesion to GaAs, the Pt layer provides heat resistance and barrier properties, and the Au layer provides electrical conductivity. This universal structure satisfies the different functional requirements of both the FET gate electrode and MIM capacitor lower electrode

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses composite materials by combining multiple metal layers (Ti, Pt, Au) into a single electrode structure. Each layer contributes different properties: Ti for adhesion, Pt for thermal stability and diffusion barrier, and Au for electrical conductivity. This composite structure enables a single manufacturing process to produce electrodes that meet diverse functional requirements

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the number of manufacturing steps, enhances the reliability of the MIM capacitor, and improves the overall throughput by allowing simultaneous formation of the gate electrode and lower electrode, thereby streamlining the production process.

Implementation Method 1

a gate electrode composed of a Schottky metal Ti/Pt/Au is formed between these electrodes

Methodology Applied
Scientific EffectSchottky contact:

Implementation Method 2

forming the gate electrode of the field effect transistor and the lower electrode of the MIM capacitor simultaneously using a lift-off method

Methodology Applied
Scientific EffectLift-off method:

Data Source

PatentUS8030691B2Semiconductor device and manufacturing method therefor
Publication Date: 2011.10.04 KK TOSHIBA
  • US8030691B2 patent drawing
  • US8030691B2 patent drawing
  • US8030691B2 patent drawing

AI summary

An MMIC 100 is a semiconductor device which includes an FET formed on a GaAs substrate 10 and an MIM capacitor having a dielectric layer 20b arranged between a lower electrode 18b and an upper electrode 22b. A method for manufacturing the MMIC 100 is provided, in which a source electrode 16a and a drain electrode 16b of the FET are formed and then a gate electrode 18a of the FET and a lower electrode 18b of the MIM capacitor are formed simultaneously by the lift-off method.