MMIC Synchronization Path Through Empty Solder Ball Rows
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Solution Overview
Problem
Current connection techniques for MMICs in high-frequency radiofrequency applications, such as FC-BGA and eWLB, increase complexity and cost due to the need for additional PCB layers and signal transitions, particularly for synchronization signals, leading to undesirable signal amplitude drops.
Innovation Solution
An integrated circuit and electronic device design that includes a conductive synchronization path aligned with empty rows of solder balls, allowing the synchronization signal to be routed without additional PCB layers, using conductive strips or microstrips/coplanar waveguides integrated within the MMICs, reducing complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If additional PCB layers are used for synchronization signal routing, then signal routing capability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the synchronization signal routing function with the existing solder ball array structure by creating empty columns within the grid. This allows the synchronization signal to be routed through the same PCB layer that contains the solder balls, eliminating the need for separate dedicated routing layers and reducing overall PCB complexity.
Solution Approach 2:
The PCB layer containing the solder ball array is given multiple functions: it serves both as the mechanical/electrical connection substrate for the MMICs and as the synchronization signal routing path. The empty columns in the solder ball grid are utilized to create conductive traces for synchronization signals, making the same structural element serve dual purposes.
2Ease of operation
If additional PCB layers are used for synchronization signal routing, then signal routing capability is improved, but manufacturing cost increases
Solution Approach 1:
The patent combines the synchronization signal routing function with the existing solder ball array structure by creating empty columns within the grid. This allows the synchronization signal to be routed through the same PCB layer that contains the solder balls, eliminating the need for separate dedicated routing layers and reducing overall PCB complexity.
Solution Approach 2:
The PCB layer containing the solder ball array is given multiple functions: it serves both as the mechanical/electrical connection substrate for the MMICs and as the synchronization signal routing path. The empty columns in the solder ball grid are utilized to create conductive traces for synchronization signals, making the same structural element serve dual purposes.
3Ease of operation
If synchronization signals are routed through additional PCB layers, then signal routing is enabled, but signal amplitude drops occur
Solution Approach 1:
Instead of routing synchronization signals through additional vertical PCB layers (z-dimension), the patent routes them horizontally within the same PCB layer plane by utilizing empty columns in the solder ball grid. This in-plane routing approach reduces the number of layer transitions and associated signal losses.
Solution Approach 2:
The patent extracts the synchronization signal routing function from the vertical layer stack and implements it within the existing horizontal plane of the solder ball array layer. By taking the routing function out of the vertical dimension and placing it in the horizontal dimension, the number of layer transitions is minimized.
Data Source
AI summary
An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.


