MMIC Package Layout With Empty Solder-Ball Line for Sync Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current connection techniques for high-frequency MMICs in radiofrequency applications, such as FC-BGA and eWLB, increase complexity and cost due to the need for additional internal layers for synchronization signal routing, leading to signal amplitude drops and layout complexity.
Innovation Solution
The integration circuit package arranges solder balls in an array with an empty line, allowing a conductive synchronization path to extend along this line, eliminating the need for an additional connection level in the PCB and using the same conduction layer as radiofrequency signals, thereby simplifying the synchronization signal routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FC-BGA or eWLB techniques are used to connect high-frequency MMICs, then reliable electrical connection is achieved, but PCB complexity and manufacturing cost increase due to additional internal layers required for synchronization signal routing
Solution Approach 1:
The patent merges the synchronization signal routing function with the existing solder ball array structure by creating an empty line (removing solder balls from one column), allowing the synchronization path to share the same PCB layer as RF signal connections. This eliminates the need for separate internal layers for synchronization routing, reducing PCB complexity while maintaining connection reliability.
Solution Approach 2:
The empty line in the solder ball array serves multiple functions: it provides a routing path for synchronization signals while utilizing the same PCB surface layer that carries RF signal connections. This multi-functional use of the same structural element (surface layer) avoids adding dedicated internal layers, thereby reducing overall device complexity.
2Adaptability or versatility
If additional internal PCB layers are added for synchronization signal routing, then signal routing capability is improved, but manufacturing cost and device complexity increase
Solution Approach 1:
The synchronization signal routing is merged with the existing surface layer infrastructure by removing solder balls from one column to create a clear path. This allows synchronization signals to be routed on the same layer as RF connections, eliminating the need for additional internal layers and associated manufacturing costs.
Solution Approach 2:
Solder balls are extracted (removed) from one column of the array to create an empty line. This extraction creates the necessary routing space for synchronization signals on the surface layer without requiring additional internal PCB layers, thereby reducing manufacturing complexity and cost.
3Adaptability or versatility
If additional internal PCB layers are used for synchronization routing, then signal routing is enabled, but signal amplitude drops due to increased transitions between layers
Solution Approach 1:
The synchronization signal path is merged with the existing surface layer that carries RF signals. By routing synchronization signals on the same layer rather than transitioning through multiple internal layers, the number of transitions is minimized, reducing signal amplitude drops and maintaining higher signal levels.
4Quantity of substance
If solder balls are arranged in a complete array, then electrical connections are maximized, but synchronization signal routing becomes complex requiring additional PCB layers
Solution Approach 1:
Solder balls are selectively removed from one column of the array to create an empty line. This extraction creates a clear routing path for synchronization signals on the surface layer, reducing routing complexity while maintaining the maximum number of electrical connections through the remaining solder balls.
Solution Approach 2:
The empty column created by removing solder balls is merged with the synchronization signal routing function. This structural modification allows synchronization signals to be routed along the empty line on the same surface layer, simplifying the overall routing architecture while preserving electrical connection density.
Data Source
AI summary
An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.