MMIO Storage Controller Mapping for Faster Inter-Device Data Transfer
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Solution Overview
Problem
The interaction delay between the CPU and DMA controller in high-speed I/O operations limits the data transmission rate, leading to reduced efficiency in modern computer systems.
Innovation Solution
Implementing a memory-mapped input/output (MMIO) mapping that allows the processor to directly send instructions to a storage controller, bypassing memory access, thereby enabling direct access to storage addresses and reducing interaction delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous DMA solution is used with CPU interaction for DMA request and interrupt, then device compatibility and control flexibility are improved, but interaction delay between CPU and DMA controller increases, limiting data transmission rate
Solution Approach 1:
The patent extracts the DMA control functionality from the CPU by implementing a standalone storage controller with integrated DMA capabilities. The storage controller independently handles data transfer operations between storage devices and memory without requiring CPU intervention for each transfer, thus removing the source of interaction delay while maintaining system compatibility
Solution Approach 2:
The patent introduces a storage controller as an intermediary component between the CPU and storage devices. This mediator handles all DMA operations, including data transfer coordination and CPU interaction, allowing the CPU to focus on computation while the storage controller manages data movement, thereby reducing overall system latency
2Device complexity
If traditional memory access method is used for storage operations, then system simplicity is maintained, but data transmission rate between processor and storage controller is reduced due to memory access delays
Solution Approach 1:
The patent segments the system into distinct functional components: a processing unit for computation, a storage controller for data management, and integrated memory. The storage controller includes its own local memory and control logic, allowing it to operate independently and directly exchange data with storage devices without accessing the main system memory, thus improving transmission speed while maintaining modular system simplicity
Data Source
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AI summary
Embodiments of this application disclose a data processing apparatus and method, and a related device. The apparatus is used in a first device, and the apparatus includes a processor and a storage controller. Storage space of a second device is mapped to a memory-mapped input/output MMIO address space of the first device. N MMIO addresses in the MMIO address space of the first device are in a one-to-one correspondence with N first storage addresses in the storage space of the second device. The processor is configured to send a first instruction to the storage controller, where the first instruction includes a target MMIO address. The storage controller is configured to: receive the first instruction, and determine a first storage address corresponding to the target MMIO address; and send a first operation instruction to the second device, where the first operation instruction corresponds to the first instruction, and the first operation instruction includes the first storage address. According to embodiments of this application, a data transmission rate between devices can be improved.