Centralized MMU with Distributed TLBs for IC Virtualization

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Solution Overview

Problem

Integrated circuits face challenges in efficiently virtualizing and sharing resources due to limited space, leading to trade-offs between transaction processing and resource allocation, with existing solutions struggling to optimize virtual address translation and resource management.

Innovation Solution

A centralized Memory Management Unit (MMU) with a master translation lookaside buffer (TLB) and local TLBs is implemented to facilitate virtualization and sharing of resources, reducing translation latency and increasing bandwidth by storing virtualization information and replicating it across local TLBs, enabling efficient virtual address translation and resource management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a centralized MMU with master TLB is used for virtualization, then resource sharing and virtual address translation are improved, but translation latency increases due to centralized access requirements

Engineering Contradiction:

Improveresource sharing capabilityVSAvoidtranslation latency

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent divides the centralized MMU functionality into a master TLB in the interconnect and multiple local TLBs distributed at different locations. This segmentation allows parallel translation operations across multiple TLBs, reducing the bottleneck effect of a single centralized TLB while maintaining centralized coordination for resource sharing and virtualization.

Inventive Principle:

Principle #1Segmentation

2Productivity

If more TLBs are distributed throughout the circuit, then translation bandwidth increases, but device complexity increases due to multiple TLB components

Engineering Contradiction:

Improvetranslation bandwidthVSAvoidnumber of TLB components

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The local TLBs serve multiple functions: they perform local virtual address translation to reduce latency, replicate master TLB entries for parallel processing, and coordinate with the master TLB for centralized resource management. This multi-functionality justifies the added complexity by delivering significant bandwidth and performance improvements.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The local TLBs replicate entries from the master TLB in advance, so that when translation requests arrive, the translated addresses are already prepared and available. This preliminary action of copying and pre-loading translation entries into local TLBs enables parallel processing and reduces the overall translation time.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS9405700B2Methods and apparatus for virtualization in an integrated circuit

Publication Date: 2016.08.02 META PLATFORMS TECHNOLOGIES LLC

AI summary

Various methods and apparatus are described for communicating transactions between one or more initiator IP cores and one or more target IP cores coupled to an interconnect. A centralized Memory Management logic Unit (MMU) is located in the interconnect for virtualization and sharing of integrated circuit resources including target cores between the one or more initiator IP cores. A master translation look aside buffer (TLB) stores virtualization and sharing information in the entries of the master TLB. A set of two or more translation look aside buffers (TLBs) locally store virtualization and sharing information replicated from the master TLB. Logic in the MMU or other software updates the virtualization and sharing information replicated from the master TLB in the entries of one or more of the set of local TLBs.