MMU Shared Address Space Identifier for TLB Efficiency
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Solution Overview
Problem
Current MMU designs, such as the ARC700, waste resources by requiring each process to have its own virtual address space and private TLB entries for shared libraries, leading to increased TLB pressure and CPU cycles spent on TLB fault handling due to the ASID feature, which results in reduced effective TLB size and increased contention for TLB slots.
Innovation Solution
Introduction of a new shared address space ID (SASID) register and modified TLB entries with a shared bit, allowing the MMU to manage shared TLB entries across processes, reducing the need for process-private entries and minimizing TLB misses by enabling efficient reuse of TLB entries for shared code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ASID feature is used to manage process-private TLB entries, then process isolation and correctness are improved, but effective TLB size is reduced and TLB contention is increased
Solution Approach 1:
The patent merges the ASID field and process ID field into a unified process address space identifier (PASID) that serves both process identification and address space identification functions. This consolidation eliminates redundant tagging mechanisms and allows TLB entries to be shared across processes that use the same PASID, thereby increasing the effective TLB size while maintaining process isolation through the unified identifier.
Solution Approach 2:
The PASID register is designed to serve multiple functions: it identifies the current process, tags TLB entries for process isolation, and enables shared address space identification. This multi-functional design eliminates the need for separate ASID and process ID registers, reducing hardware overhead and allowing the same identifier to be used for both private and shared address spaces, thereby resolving the contradiction between isolation and TLB efficiency.
2Reliability
If each process has private TLB entries for shared libraries, then process address space isolation is maintained, but CPU cycles spent on TLB fault handling increase
Solution Approach 1:
The patent combines process identification and address space identification into a single PASID mechanism, allowing the MMU to determine whether a TLB entry should be process-private or process-shared based on the PASID value. This unified approach enables the system to maintain address space isolation while reducing TLB faults by allowing shared libraries to use common TLB entries when accessed by multiple processes with the same PASID, thereby improving CPU cycle efficiency.
Solution Approach 2:
The system dynamically determines whether to create private or shared TLB entries based on the PASID and the nature of the address space (private vs. shared). The MMU logic adaptively selects the appropriate TLB entry type, allowing the system to optimize between isolation and performance on a per-access basis, reducing unnecessary TLB faults and improving overall productivity.
3Adaptability or versatility
If shared libraries use process-private TLB entries, then address space flexibility is maintained, but TLB slot contention increases
Solution Approach 1:
The patent merges the functionality of process identification and address space identification into the PASID, enabling the MMU to efficiently determine whether TLB entries can be shared. This consolidation reduces the overhead of managing separate ASID and process ID registers and allows the system to optimize TLB slot utilization by sharing entries for shared libraries across processes with the same PASID, thereby reducing contention while preserving address space flexibility through the unified identifier.
4Adaptability or versatility
If ASID is used to tag TLB entries, then overlapping virtual addresses from different processes can coexist, but TLB management overhead increases
Solution Approach 1:
The patent combines the ASID and process ID into a single PASID that serves both tagging functions. This merger simplifies the TLB management architecture by eliminating the need for separate ASID and process ID registers and their associated management logic. The unified PASID still enables overlapping virtual addresses from different processes to coexist in the TLB while reducing the complexity of TLB management operations.
Solution Approach 2:
The PASID register performs multiple functions: it identifies the current process, tags TLB entries for virtual address disambiguation, and enables shared address space identification. This multi-functional design eliminates the need for separate hardware components for ASID and process ID management, thereby reducing TLB management complexity while maintaining the ability to handle overlapping virtual addresses from different processes.
Data Source
AI summary
A system and a method are disclosed for more efficiently handling shared code stored in memory, comprising a modified memory management unit containing a new shared address space identifier register, and a modified TLB entry containing a new shared bit.