MMU Memory Management Modes for Direct TLB Entry Updates

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Solution Overview

Problem

Existing memory management systems face inefficiencies in address translation due to the consumption of processing and memory resources, particularly when dealing with multiple software applications and physical memory interactions.

Innovation Solution

A method and system where a memory management unit (MMU) with a translation lookaside buffer (TLB) and a configuration register operates in either software-managed or hardware-managed modes based on the configuration register's value, allowing direct modification of TLB entries in software-managed mode and denying such requests in hardware-managed mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If address translation is performed to translate virtual addresses into physical addresses, then software applications can interact with physical memory through virtual addressing, but processing and memory resources are consumed

Engineering Contradiction:

Improvevirtual address space supportVSAvoidprocessing resource consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The MMU pre-translates virtual addresses to physical addresses and stores these translations in the TLB before they are needed. When the same virtual address is accessed again, the translation is already available in the TLB, eliminating the need to perform full address translation again and reducing processing resource consumption

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The TLB creates a copy of the address translation mapping from the page tables. Instead of repeatedly accessing the full page table structure for every memory access, the system maintains a cached copy of the translations in the TLB, reducing the processing overhead of address translation

Inventive Principle:

Principle #26Copying

2Productivity

If a translation lookaside buffer (TLB) is used to cache translated addresses, then address translation performance is improved, but device complexity increases

Engineering Contradiction:

Improveaddress translation performanceVSAvoidMMU structure complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The MMU is divided into distinct functional components: the TLB for caching translations, the page table walker for managing page tables, and the configuration register for mode control. This segmentation allows each component to be optimized independently and managed separately, making the overall complex system more tractable

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The MMU includes a configuration register that allows dynamic switching between software-managed mode and hardware-managed mode. This dynamic configurability enables the system to adapt to different operational requirements and optimize performance based on the specific workload characteristics

Inventive Principle:

Principle #15Dynamics

3Reliability

If the MMU operates in hardware-managed mode by denying direct TLB modification requests, then address translation security and integrity are maintained, but software control flexibility is reduced

Engineering Contradiction:

Improveaddress translation integrityVSAvoidsoftware control flexibility

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The configuration register enables dynamic switching between hardware-managed mode (for security and integrity) and software-managed mode (for flexibility). The system can adapt its management approach based on the operational context, maintaining both reliability and flexibility at different times

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The configuration register acts as a feedback mechanism that allows the system to monitor operational requirements and adjust the management mode accordingly. Software can set the configuration register to switch between modes based on the current workload and security requirements

Inventive Principle:

Principle #23Feedback

4Ease of operation

If the MMU operates in software-managed mode by allowing direct TLB modification, then software control flexibility is enhanced, but processing resource consumption increases

Engineering Contradiction:

Improvesoftware control flexibilityVSAvoidprocessing resource consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

In software-managed mode, the software directly manages TLB entries without requiring MMU intervention for each modification. The software can bulk-load translations or manage the TLB in batches, reducing the processing overhead compared to hardware-managed mode where the MMU must validate and process each TLB modification request

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS12314187B2Software-hardware memory management modes

Publication Date: 2025.05.27 TEXAS INSTRUMENTS INC

AI summary

A method includes receiving, by a memory management unit (MMU) comprising a translation lookaside buffer (TLB) and a configuration register, a request from a processor core to directly modify an entry in the TLB. The method also includes, responsive to the configuration register having a first value, operating the MMU in a software-managed mode by modifying the entry in the TLB according to the request. The method further includes, responsive to the configuration register having a second value, operating the MMU in a hardware-managed mode by denying the request.