Microcontroller Memory Management Unit Write Access Control

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Solution Overview

Problem

Current methods for managing the coexistence of secure and non-secure applications on a microcontroller system are costly and degrade system performance due to resource consumption by hypervisors, which are necessary for virtualization but lead to slowed operations and high acquisition costs.

Innovation Solution

A method utilizing a memory management unit with write access control and a Translation Lookaside Buffer (TLB) to manage shared memory access, ensuring secure applications maintain integrity by prohibiting writes from non-secure applications through address translation rules and cyclic redundancy checks, allowing secure operations without the need for expensive hypervisor technologies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a hypervisor is implemented to manage secure and non-secure applications on the same processor, then security isolation is improved, but system performance deteriorates due to resource consumption

Engineering Contradiction:
Improvesecurity isolationVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the security management function from the hypervisor layer and implements it directly in the Memory Management Unit (MMU) hardware. By moving the security isolation mechanism from software (hypervisor) to hardware (MMU with write access control), the system achieves security isolation without the performance overhead of a hypervisor, as the MMU handles security checks transparently during memory access operations

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary mechanism in the form of a buffer for anticipation of address translation within the MMU. This buffer stores translation rules that include write access prohibitions for secure application memory regions. The intermediary buffer enables the MMU to enforce security isolation at the memory access level without requiring hypervisor intervention, thus maintaining performance while achieving security

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a hypervisor is used to partition memory space between secure and non-secure applications, then security is improved, but acquisition cost increases

Engineering Contradiction:
ImprovesecurityVSAvoidacquisition cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent implements a self-service security mechanism where the MMU automatically enforces write access control to secure memory regions through hardware-based address translation rules stored in its buffer. This eliminates the need for expensive commercial hypervisor software licenses, as the security functionality is built into the microcontroller's hardware architecture and operates autonomously without external software management layers

Inventive Principle:
Principle #25Self-service

3Reliability

If a hypervisor is implemented for virtualization, then security isolation is improved, but real-time constraints are worsened due to scheduling overhead

Engineering Contradiction:
Improvesecurity isolationVSAvoidreal-time response
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces the mechanical/software-based hypervisor scheduling system with a hardware-based MMU mechanism that operates at the memory access level. The MMU's buffer for anticipation of address translation enforces security rules in parallel with normal memory operations, eliminating the sequential scheduling overhead of a hypervisor and maintaining real-time response characteristics while achieving security isolation

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP2839408B1Method of secure management of a memory space for microcontroller
Publication Date: 2017.12.27 SCHNEIDER ELECTRIC IND SAS
  • EP2839408B1 patent drawingFigure 1
  • EP2839408B1 patent drawingFigure 2

AI summary

The present invention consists of a method of managing an electronic microcontroller system, the microcontroller system comprising two processors (CPU1, CPU2) with a first processor (CPU1) intended for the execution of a nonsecure application (Appli1) exhibiting a nonguaranteed level of functional security and integrity, and a second processor (CPU2) dedicated to the execution of a secure application (Appli2) implementing code and data, and involving a guaranteed level of functional security and integrity, said secure application (Appli2) being able to implement a security function; means of access (CT) to a shared memory space (MEM). According to the invention, the first processor (CPU1) comprises a unit for managing the memory (MMU1) configured in such a way that it implements a write access control, so as to manage write access to the shared memory space (MEM), that is not modifiable when the secure application (Appli2) implements its security function.