mmWave Digital Pre-Processing Chip for Flexible RF-Baseband Partitioning
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Solution Overview
Problem
Existing transceiver architectures for mmW communication face challenges in flexibility, power consumption, and routing complexity, particularly in devices with distributed antennas, and require a solution that optimizes size, cost, and power consumption while maintaining flexibility and independent design of RF and baseband chips.
Innovation Solution
A digital pre-processing chip is introduced, partitioning the traditional mmW RF chips and baseband chip architecture into three segments, with an analog interface to RF chips and a digital interface to the baseband chip, incorporating pre-processing functions like channel estimation and RF calibration, thereby optimizing signal transfer and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional two-segment architecture (RF chips and baseband chip) is used, then device complexity is reduced, but flexibility and independent design capability deteriorate
Solution Approach 1:
The patent divides the traditional two-segment architecture into three independent segments: RF chips, digital pre-processing chip, and baseband chip. This segmentation allows each component to be designed and optimized independently, improving flexibility and adaptability while managing complexity through modular design.
Solution Approach 2:
The digital pre-processing chip acts as an intermediary between the RF chips and the baseband chip. It handles digital signal processing functions such as channel estimation, RF calibration, and beamforming, thereby decoupling the RF and baseband components and enabling independent design of each segment.
2Reliability
If more processing functions are integrated into RF chips, then signal processing capability is improved, but power consumption increases
Solution Approach 1:
The patent extracts digital signal processing functions (channel estimation, RF calibration, beamforming) from the RF chips and relocates them to a separate digital pre-processing chip. This extraction reduces the power consumption of RF chips while maintaining enhanced signal processing capability through dedicated processing in the pre-processing chip.
3Reliability
If distributed antennas are used, then beamforming capability is improved, but routing complexity increases
Solution Approach 1:
The digital pre-processing chip serves as an intermediary that manages the complexity of routing signals between distributed antennas and the baseband processor. It implements beamforming algorithms and signal routing logic, thereby enabling advanced beamforming capability while abstracting away the routing complexity from the overall system architecture.
Data Source
AI summary
A digital pre-processing chip comprises an analog interface for transmitting and receiving analog signals to and from a plurality of analog Radio Frequency (RF) chips, and a digital interface for transmitting and receiving digital signals to and from a baseband chip. The digital pre-processing chip further comprises a plurality of Analog-to-Digital Converters (ADCs) for converting a plurality of analog signals received via the analog interface to a plurality of RX digital signals, and a plurality of Digital-to-Analog Converters (DACs) for converting a plurality of TX digital signals to a plurality of analog signals to be transmitted to the plurality of analog RF chips via the analog interface. The digital pre-processing chip further comprises pre-processing circuitry configured to pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface.