Mnemonic Phrase Management for Secure Chips
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Solution Overview
Problem
Existing methods for storing mnemonic words in secure chips require excessive space due to the large address space needed for each word, exceeding the capacity of small security chips and failing to meet manufacturing requirements.
Innovation Solution
A method that generates a random number, performs computations to acquire and concatenate data, divides the concatenated value into groups, and uses the groups to index and store mnemonic words in an offset storage area, eliminating the need for end identifiers and optimizing storage space by using start offset addresses to retrieve corresponding mnemonic words.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If mnemonic words are stored with traditional address space allocation (4 bytes per word), then each mnemonic word can be accessed efficiently, but the total storage space required exceeds the capacity of small security chips
Solution Approach 1:
The patent segments the storage structure into two separate areas: an offset storage area that stores starting addresses of mnemonic words, and a mnemonic word storage area that stores the actual words. This segmentation allows the system to use compact offset addresses instead of full address space for each mnemonic word, significantly reducing the total storage requirement while maintaining efficient access capability.
Solution Approach 2:
The patent pre-calculates and stores the offset addresses of all mnemonic words in the offset storage area before actual access occurs. This preliminary action enables quick determination of mnemonic word positions during runtime without requiring complex address calculations, thereby simplifying the address space management while maintaining efficient access.
2Ease of operation
If end identifiers are included for each mnemonic word to mark word boundaries, then word retrieval is simplified, but additional storage space is consumed
Solution Approach 1:
The patent extracts the boundary-marking function from the mnemonic word storage itself and relocates it to the offset storage area. Instead of embedding end identifiers within or after each mnemonic word, the system stores only the starting offset addresses in the offset storage area. The length of each mnemonic word is determined by calculating the difference between consecutive offset addresses, thereby eliminating the need for additional end identifier storage.
3Quantity of substance
If a compact storage format is used to reduce space, then storage efficiency improves, but the complexity of managing and accessing mnemonic words increases
Solution Approach 1:
The patent introduces an offset storage area as an intermediary structure between the control logic and the mnemonic word storage area. This intermediary stores compact offset addresses that serve as pointers to the actual mnemonic words. By using this intermediary, the system achieves compact storage while maintaining simple access operations, as the offset storage provides a direct mapping from mnemonic word index to physical storage location without requiring complex management logic.
Data Source
AI summary
A mnemonic phrase management method. The method comprises: generating a random number having a first preset length and performing calculation on the random number; splicing the random number and data having a second preset length acquired from the random number calculation result to obtain a first spliced value; grouping the first spliced value according to a third preset length; sequentially searching an offset storage area for corresponding indexes according to values of the groups; obtaining mnemonic phrase starting offset addresses and mnemonic phrase lengths according to the indexes; and acquiring corresponding mnemonic phrases from a mnemonic phrase storage area according to the mnemonic phrase starting offset addresses and the mnemonic phrase lengths and sequentially storing the mnemonic phrases into a mnemonic phrase buffer. The present invention relates to the field of information security. Compared with the prior art, the present invention can greatly reduce storage space, solve the problem of space limitation of a security chip, and save more space for applications, is applicable to existing security chips, and meets production requirements of hardware devices.