Moat Power Metallization Trench Routing
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Solution Overview
Problem
Conventional electronic devices with matrix-like cell formations face limitations in signal routing due to redundant via and metallization on power rails, requiring connections at higher metallization layers (M3 or higher), which restricts efficient signal transmission between cells.
Innovation Solution
The implementation of a moat power metallization in trenches, where the second power metallization is insulated from circuitry and first power metallization at certain locations but allows electrical communication at others, enabling local cell routing without the need for upper layer metallization connections, and utilizing a silicon-on-insulator substrate to define trenches for the moat power rail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If power rails are provided on either side of the cell formation with conventional matrix-like arrangement, then power distribution is achieved, but redundant via and metallization are required leading to limited signal routing
Solution Approach 1:
The patent moves the power rail from a planar configuration to a three-dimensional trench structure. The second power metallization is disposed in a trench defined in the dielectric layer, creating vertical separation between the power rail and circuitry. This dimensional change eliminates the need for redundant metallization layers while providing adequate power distribution and signal routing pathways in the horizontal plane.
Solution Approach 2:
The dielectric layer with insulation acts as an intermediary between the second power metallization in the trench and the circuitry/first power metallization. The insulation disposed in the dielectric layer provides electrical isolation where needed while permitting electrical communication at specific locations, enabling selective coupling without direct contact between power and signal lines.
2Productivity
If connections are made at M3 or higher metallization layers to route signals between cells, then signal transmission is achieved, but the requirement for higher layer connections increases device complexity and reduces routing efficiency
Solution Approach 1:
By placing the power rail in a trench below the circuitry plane, the patent creates vertical separation that frees up horizontal routing paths. Signals can be routed in the same plane as the circuitry without needing to ascend to higher metallization layers, thereby improving signal transmission efficiency and reducing the overall metallization structure complexity.
Data Source
AI summary
An electronic device is provided. The electronic device includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, circuitry disposed on the dielectric layer that includes interconnected cells, first contact line metallization and second contact line metallization, first power metallization disposed in-plane with or above the circuitry and second power metallization disposed in a trench defined in at least the dielectric layer. The electronic device further includes insulation disposed to insulate the second power metallization from the circuitry and the first power metallization at first locations and to permit electrical communication between the second power metallization, the circuitry and the first power metallization at second locations.