Mobile Device Memory Block Clearing via User-Triggered Garbage Collection
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Solution Overview
Problem
Conventional mobile electronic devices using flash memory experience fragmentation issues due to asymmetrical data programming and erasing units, leading to accumulation of invalid data and prolonged garbage collection processes that can delay or halt device operation.
Innovation Solution
A mobile electronic device with an interface unit, semiconductor storage device, and processor that allows users to manually initiate memory block clearing through a user interface, enabling them to decide when and how to clear memory blocks, thereby preventing unnecessary delays and maintaining user experience.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If garbage collection is performed automatically to clear memory blocks, then fragmentation is reduced and memory is recycled, but device operation is delayed or halted due to the time-consuming process
Solution Approach 1:
The system dynamically adjusts the garbage collection mechanism from continuous automatic execution to user-triggered on-demand execution. The controller monitors memory block status and waits for user input before initiating clearance operations, allowing the device to switch between normal operation mode and memory maintenance mode as needed.
Solution Approach 2:
The system provides self-monitoring capabilities where the controller tracks invalid data accumulation and memory block status automatically. When memory fragmentation reaches a threshold level, the system prepares clearance information and presents it to the user for approval, enabling the system to serve itself in monitoring while requiring user decision for actual maintenance actions.
2Quantity of substance
If memory blocks are cleared frequently to prevent fragmentation, then memory availability is maintained, but user experience deteriorates due to operational delays
Solution Approach 1:
The controller performs preliminary monitoring and assessment of memory block status, identifying which blocks contain invalid data and calculating the time required for clearance operations. This preliminary information is then presented to the user before actual clearance begins, allowing users to make informed decisions about when maintenance is needed versus when normal operation should continue.
Solution Approach 2:
The system implements a feedback loop where the controller continuously monitors memory block status, determines when clearance is needed, and communicates this information to the user through the interface unit. The user receives feedback about memory status and can choose to initiate clearance when appropriate, creating a responsive system that adapts to both system needs and user preferences.
3Productivity
If the system waits for user input to clear memory blocks, then device operation is maintained without delay, but memory fragmentation accumulates and reduces storage capacity
Solution Approach 1:
The controller performs preliminary assessment of memory block status, identifying invalid data and calculating clearance requirements in advance. This preparation allows the system to respond quickly to user requests for memory clearance without causing operational delays, as the necessary information and targeting are already determined before user input is received.
Solution Approach 2:
The system changes the operational parameter from continuous automatic clearance to on-demand clearance triggered by user input. The controller monitors memory status parameters and waits for user activation before initiating clearance operations, allowing the device to maintain normal operational parameters while still addressing memory fragmentation when the user initiates the process.
Data Source
AI summary
A mobile electronic device including an interface unit, a semiconductor storage device and a processor is provided. The interface unit provides a user interface to receive a user input. The semiconductor storage device includes a controller and a non-volatile memory. The non-volatile memory is coupled to the controller and includes a plurality of memory blocks. The processor is coupled to the interface unit and the semiconductor storage device. The processor sends a signal to the semiconductor storage device in response to the user input. The controller clears at least one of the memory blocks in response to the signal.