DRAM Mode Register Compilation Circuit for Reserved Code Compatibility

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Solution Overview

Problem

Mode registers in DRAM have poor compatibility with different application environments due to the lack of compilation circuits for reserved codes, leading to operational issues when receiving reserved codes from DRAM controllers, which affects the overall performance of DRAM.

Innovation Solution

A compilation method and circuit that receives a signal to be compiled and a resistance matching signal, performs compilation processing, and in the case of a reserved code, performs compatibility selection processing to determine a compiled value, allowing the mode register to adjust resistance values and match different application platforms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If mode register uses standard compilation circuit without reserved code handling, then device complexity is reduced, but adaptability deteriorates due to poor compatibility with different application platforms

Engineering Contradiction:
Improvecompatibility with different application platformsVSAvoidcompilation circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-defining compilation rules for reserved codes in the mode register. The compilation circuit is designed in advance to handle reserved codes through specific compilation rules that map reserved code combinations to valid parameter values. This allows the mode register to accommodate different application platforms without requiring complex runtime decision-making or additional hardware components.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If mode register adds compilation circuit for reserved codes, then adaptability improves, but device complexity increases

Engineering Contradiction:
Improvecompatibility with different application platformsVSAvoidcompilation circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing a compilation circuit that handles both standard codes and reserved codes through a unified compilation rule set. The same compilation circuit infrastructure is used for all code types, with reserved codes simply mapping to predefined parameter values according to established compilation rules. This multi-functional approach allows the circuit to serve multiple purposes without requiring separate dedicated hardware for reserved code handling.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If mode register implements compatibility selection for reserved codes, then reliability improves by ensuring operational status, but device complexity increases

Engineering Contradiction:
Improveoperational status of mode registerVSAvoidcompilation circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the compilation rules to include specific mappings for reserved codes to valid parameter values. When reserved codes are detected, the compilation circuit automatically applies predefined parameter assignments that ensure the mode register remains operational. This parameter-based approach maintains reliability by ensuring valid parameter output for all code inputs without requiring complex control logic or additional circuitry.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12046321B2Compilation method, compilation circuit, mode register and memory
Publication Date: 2024.07.23 CHANGXIN MEMORY TECH INC
  • US12046321B2 patent drawing
  • US12046321B2 patent drawing
  • US12046321B2 patent drawing

AI summary

A compilation method includes the following: receiving a signal to be compiled and a resistance matching signal; performing compilation processing on the signal to be compiled to obtain a compilation result signal; and in the case where the signal to be compiled is a reserved code, performing compatibility selection processing on the compilation result signal according to the resistance matching signal to determine a first compiled value.