Mode Registers for Error-Corrected Memory Write Patterns
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Solution Overview
Problem
Semiconductor devices consume excessive power and perform redundant error checking operations when writing data patterns to memory banks, as they repeatedly drive data paths and check for errors in each memory bank, especially when writing the same pattern multiple times.
Innovation Solution
Incorporating mode registers within the semiconductor device to store pre-checked data patterns with parity bits, allowing subsequent writes to bypass error checking operations and directly use the mode registers to write error-corrected data to memory banks, reducing power consumption and data path usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor device repeatedly drives data paths and performs error checking operations for each memory bank when writing data patterns, then data can be written to multiple memory banks, but power consumption increases excessively
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing error correction codes (ECC) in mode registers before actual data writing operations. When a write pattern command is received, the device writes data directly using the pre-computed ECC values without performing redundant error checking during each write operation. This preliminary computation of error correction data eliminates repeated power-consuming error checking while maintaining data integrity across multiple memory bank writes.
2Reliability
If the semiconductor device performs error checking operations in each memory bank when writing data patterns, then data integrity is maintained, but redundant operations increase processing time
Solution Approach 1:
The patent implements preliminary action by computing and storing error correction codes in advance in mode registers before the actual data writing process. When writing data patterns to multiple memory banks, the device uses these pre-computed ECC values directly without performing time-consuming error checking operations during each write. This maintains data integrity through pre-validated error correction while significantly reducing the time required for writing operations across multiple memory banks.
3Productivity
If the semiconductor device uses continuous data path access for writing patterns to multiple memory banks, then data can be written efficiently, but power consumption increases due to repeated data path driving
Solution Approach 1:
The patent applies the copying principle by storing data patterns and their corresponding error correction codes in mode registers, creating reusable templates. When the same or similar data patterns need to be written to multiple memory banks, the device retrieves and uses these pre-stored copies from mode registers instead of repeatedly driving data through the data path. This copying approach maintains writing efficiency while dramatically reducing power consumption by eliminating redundant data path activations.
Data Source
AI summary
A semiconductor device may include a memory bank and a plurality of mode registers that communicatively couple to each of the plurality of memory banks. The plurality of mode registers may include a pattern of data stored therein. The semiconductor device may also include a bank control that receives a write pattern command that causes the bank control to write the pattern of data into the memory bank, send a signal to a multiplexer to couple the plurality of mode registers to the memory bank, and write the pattern of data to the memory bank via the plurality of mode registers.