Mode-Selectable I/O Receiver Circuits for Impedance Matching
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Solution Overview
Problem
As operation speeds increase, impedance mismatching and external noise interference become significant issues in input/output interfaces of systems on chip (SoC) and memory devices, necessitating improved termination methods.
Innovation Solution
A method of operating input/output interfaces that selectively uses different output driver and input receiver circuits based on mode selection signals, adjusting termination levels and circuit configurations to optimize performance for high-speed and low-speed operations, controlled by mode register set commands and memory latency considerations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If operation speed is increased, then data transmission speed is improved, but impedance mismatching and noise interference increase
Solution Approach 1:
The patent implements dynamic selection of input receiver circuits based on operation mode (high-speed or low-speed). The system switches between different receiver circuits optimized for different speed ranges, allowing the interface to adapt its characteristics to match the current operating conditions. This dynamic adaptation enables high-speed operation when needed while maintaining signal integrity by selecting appropriate termination and circuit configurations.
Solution Approach 2:
The patent changes physical parameters of the input/output interface by selecting different termination levels (e.g., 50 ohm, 75 ohm, or high-impedance states) and different receiver circuit configurations based on the operation mode. These parameter changes allow the system to optimize impedance matching for different speed regimes, reducing reflections and noise interference during high-speed operations.
2Device complexity
If a single input receiver circuit is used, then device complexity is reduced, but performance optimization for different operation modes is limited
Solution Approach 1:
The patent segments the input receiver functionality into multiple specialized circuits, each optimized for specific operation modes. Instead of using one general-purpose receiver for all conditions, the system divides the receiver function into high-speed optimized circuits and low-speed optimized circuits, selecting the appropriate segment based on current operational requirements. This segmentation allows each circuit to be finely tuned for its specific purpose.
Solution Approach 2:
The input/output interface is designed with multi-functional capability by incorporating multiple input receiver circuits that can be selectively activated. The system universally supports both high-speed and low-speed operations through a single interface structure that dynamically configures itself, eliminating the need for separate physical interfaces for different speed modes.
Data Source
AI summary
A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and outputting a data signal using the selected one of the plurality of output driver circuits. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an on-die termination (ODT) circuit included in the input/output interface according to the mode selection signal. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an ODT circuit included in the input/output interface according to the mode selection signal.