Mode-Specific Register Access Control for Context Switching
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Solution Overview
Problem
Switching contexts in data processing apparatuses is time-consuming due to the need to update data values in registers, especially when switching between secure and non-secure domains or virtual machines, as existing methods require saving and loading data from memory buffers.
Innovation Solution
A control register with a programmable access field is introduced, allowing selective denial of access to mode-specific registers during context switches, thereby avoiding updates and reducing switching time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data values in all registers are updated during context switching, then data integrity and correctness are maintained, but context switching time increases significantly
Solution Approach 1:
The patent segments registers into two categories: mode-specific registers and other registers. During context switching, the system selectively updates only the mode-specific registers while skipping updates to other registers, thereby reducing switching time while maintaining data integrity for the critical registers that do change between contexts.
Solution Approach 2:
The patent applies different update behaviors to different register types. Mode-specific registers undergo selective updating based on context changes, while other registers are excluded from the update process during context switching. This localized approach optimizes performance by updating only what is necessary.
2Stability of the object's composition
If all registers are updated during context switch, then complete state restoration is achieved, but system performance deteriorates due to increased switching overhead
Solution Approach 1:
The patent extracts mode-specific registers from the general register set and applies specialized handling to them. During context switching, only these extracted mode-specific registers are updated, while the rest of the register state is preserved or handled differently, thereby maintaining essential state restoration without the full overhead of updating all registers.
3Reliability
If mode-specific registers are always updated during context switch, then correctness in mode transitions is ensured, but time consumption increases
Solution Approach 1:
The patent implements dynamic behavior where the update operation for mode-specific registers is conditional rather than mandatory. The system determines whether to update mode-specific registers based on the specific context transition requirements, allowing flexibility to skip updates when not necessary, thereby reducing time consumption while maintaining correctness when needed.
Data Source
AI summary
A data processing apparatus and method are provided for controlling access to registers. The data processing apparatus comprises a processing unit for performing data processing operations on data values, the processing unit having a plurality of modes of operation. A plurality of registers are provided for storing data values for access by the processing unit, with a subset of those registers being mode specific registers. Each mode specific register is used by the processing unit when operating in an associated mode of operation. The processing unit is switchable between a plurality of contexts, the data values stored in the plurality of registers being dependent on a current context of the processing unit. The processing unit performs a switch operation to switch from the current context to a new context, during which the data values in the registers are updated having regard to the new context. A control register is provided which, for at least one mode of operation having at least one mode specific register associated therewith, has an access field which is programmable by the processing unit when operating in a predetermined mode of operation. When the access field is set, the processing unit is selectively denied access to the associated at least one mode specific register, whereby updating of the data values in the associated at least one mode specific register is avoided during the switch operation. This significantly increases the speed of the switch operation.


