Modem Data Reordering via Application Processor Memory Offload

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Solution Overview

Problem

Current systems face challenges in handling increased data rates and loads from multiple radio access technologies (RATs), leading to memory overflow issues in modem devices, which can result in out-of-order data delivery to application processors, potentially dropping bearers or calls to maintain device stability.

Innovation Solution

The method involves a modem processor receiving data packets from multiple RATs, buffering and reordering them, and providing reordering information to an application processor, which buffers and reorders the packets in memory, allowing for in-order data delivery without overloading modem memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data packets from multiple RATs are received and buffered in modem memory for reordering, then data delivery order is maintained, but modem memory capacity is exceeded causing system instability

Engineering Contradiction:
Improvedata delivery orderVSAvoidmodem memory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the reordering buffer functionality from the modem processor and relocates it to the application processor. The modem processor sends raw data packets to the application processor, which then performs the buffering and reordering operations in its own memory space, thereby relieving the modem processor of memory capacity constraints.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The application processor serves as an intermediary between the modem processor and the upper-layer protocols. It receives data packets from the modem processor, performs the reordering function, and then delivers data in the correct sequence to higher layers, effectively mediating the memory capacity issue.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If data packets are received at increased data rates from multiple RATs, then data handling capacity is improved, but memory overflow issues occur leading to bearer drops or call drops

Engineering Contradiction:
Improvedata handling capacityVSAvoidbearer stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions the reordering buffer from one-dimensional modem processor memory to the two-dimensional space of application processor memory, which has significantly larger capacity. This dimensional change allows the system to handle increased data rates without proportionally increasing modem memory requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If reordering is performed in the modem processor, then data order is maintained, but device complexity increases due to modem memory management overhead

Engineering Contradiction:
Improvedata sequence orderVSAvoidmodem processor complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the reordering logic and buffer management complexity from the modem processor and relocates it to the application processor. The modem processor's role is simplified to merely receiving and forwarding data packets, while the application processor handles the complex reordering operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10764781B2Systems and methods for reordering data received from a plurality of radio access technologies (RATs)
Publication Date: 2020.09.01 QUALCOMM INC
  • US10764781B2 patent drawing
  • US10764781B2 patent drawing
  • US10764781B2 patent drawing

AI summary

A method for reordering data by an electronic device is described, including receiving a first set of data packets via a first radio access technology (RAT). The method also includes receiving a second set of data packets via a second RAT. The first and second sets of data packets are from a data stream. The method further includes providing at least a portion of the first set of data packets or of the second set of data packets to an application processor. The method additionally includes buffering, in application processor memory, the at least the portion of the first set of data packets or the at least the portion of the second set of data packets. The method also includes reordering the at least the portion of the first set of data packets or the at least the portion of the second set of data packets.