On-Die Microprocessor for Modifiable Memory Repair
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices with one-time programmable solutions for repairing defective memory cells are unable to update or modify repair information, leading to decreased longevity and reliability, and increased footprint due to the use of large one-time programmable devices like fuses or anti-fuses.
Innovation Solution
Storing repair information in a non-volatile memory array, such as a ferroelectric memory array, and using an on-die microprocessor to retrieve and program this information into repair circuitry, allowing for real-time updates and comparisons, thereby redirecting access operations to redundant memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If one-time programmable devices (fuses or anti-fuses) are used to store repair information, then repair capability is provided, but device footprint increases and reliability decreases due to inability to update
Solution Approach 1:
The patent merges the repair information storage function with the main memory array by using spare rows within the same memory structure. This eliminates the need for separate one-time programmable devices, reducing footprint while enabling updates through standard memory programming operations. The repair information is stored in the same memory介质, allowing dynamic modification without additional hardware.
Solution Approach 2:
The memory array serves multiple functions: it stores both user data and repair information, and can perform both normal memory operations and repair operations. The spare rows are universally used for repair information storage, replacing the dedicated function of one-time programmable devices. This multi-functionality reduces overall device complexity and footprint.
2Reliability
If one-time programmable solutions are used for memory repair, then initial defect coverage is achieved, but longevity decreases due to inability to address new defects
Solution Approach 1:
The patent transforms the static, one-time programmable repair information into dynamic, updatable information. Repair addresses can be modified at any time by programming the spare memory rows, allowing the system to adapt to new defects that arise during operation. This dynamic capability extends the operational lifespan of the memory device.
Solution Approach 2:
The system implements a feedback mechanism where defects are detected during operation, and repair information is updated accordingly. The microprocessor continuously monitors memory health and modifies repair information in response to detected defects, creating a closed-loop system that improves reliability over time rather than degrading.
3Ease of operation
If one-time programmable devices are used to store repair information, then repair functionality is enabled, but device complexity increases
Solution Approach 1:
The patent extracts the repair information storage function from separate one-time programmable devices and relocates it to the main memory array. This consolidation eliminates the need for additional repair circuitry structures and simplifies the overall device architecture while maintaining ease of programming through standard memory interfaces.
Solution Approach 2:
The same memory array and control circuitry are used for both data storage and repair information storage, eliminating the need for separate dedicated circuits. The microprocessor and memory interface are universally applied to both functions, reducing overall device complexity while maintaining full repair functionality.
Data Source
AI summary
Methods, systems, and devices for modifiable repair solutions for a memory array are described to support storing repair information for a memory array within the memory array itself. A memory device may include the memory array and an on-die microprocessor, where the microprocessor may retrieve the repair information from the memory array and write the repair information to repair circuitry used for identifying defective memory addresses. The microprocessor may support techniques for identifying additional defects and updating the repair information during operation of the memory array. For example, the microprocessor may identify additional defects based on errors associated with one or more memory cells of the memory array or based on testing performed on one or more memory cells of the memory array. In some cases, a host device may identify additional defects and may notify the microprocessor of the additional defects.


