Modifiable Strain Inducing Layer for CMOS Mobility

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Solution Overview

Problem

Conventional semiconductor devices face challenges in improving channel mobility for both NMOS and PMOS transistors simultaneously, as tensile strain enhances electron mobility but degrades hole mobility, while compressive strain improves hole mobility but degrades electron mobility, leading to performance trade-offs between the two types of devices.

Innovation Solution

A modifiable strain inducing layer is fabricated that can be altered to induce either tensile or compressive strain in different regions of the semiconductor device, allowing for the same layer to provide varied strain types and amounts, thereby optimizing performance for both NMOS and PMOS channels without requiring separate strain inducing layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate strain inducing layers are used for NMOS and PMOS devices, then device performance is optimized, but fabrication complexity and processing steps increase

Engineering Contradiction:
Improvedevice performanceVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple strain inducing layers that would traditionally be formed separately are merged into a single strain inducing layer. This single layer is then selectively modified in different regions to provide the appropriate strain type for each device, reducing fabrication complexity while maintaining performance optimization

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

A single strain inducing layer is designed to serve multiple functions by providing different strain types to different device regions. Through selective modification, the same layer optimizes both NMOS and PMOS devices, eliminating the need for separate layers

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances channel mobility and drive current in semiconductor devices, enabling further scaling and reducing the need for additional processing steps and resources, thus improving overall device performance and efficiency.

Implementation Method 1

introducing selected material that relaxes the modifiable strain inducing layer within the second region

Methodology Applied
Scientific EffectStress relaxation: Stress Relaxation

Data Source

PatentUS7384861B2Strain modulation employing process techniques for CMOS technologies
Publication Date: 2008.06.10 TEXAS INSTRUMENTS INC
  • US7384861B2 patent drawing
  • US7384861B2 patent drawing
  • US7384861B2 patent drawing

AI summary

A method forms a semiconductor device comprising a modifiable strain inducing layer. A semiconductor body is provided. First and second regions of the semiconductor body are identified. A modifiable tensile strain inducing layer is formed over the device within the first and second regions. A mask is then formed that exposes the second region and covers the first region. A material is selected for a modification implant and the selected material is implanted into the second region thereby converting a portion of the modifiable tensile strain inducing layer into a compressive strain inducing layer within the PMOS region.