Modified High-K Gate Dielectric Stack for MOSFET Stability
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Solution Overview
Problem
MOSFETs employing conventional HfO2 gate dielectrics face issues with threshold voltage instability, lower mobility, and degraded positive bias temperature instability (PBTI) reliability, which affect the performance and reliability of low power devices.
Innovation Solution
A semiconductor fabrication method involving the formation of a modified high-κ gate dielectric stack on a semiconductor substrate, including a high-κ metal-oxide dielectric layer with refractory metal silicon nitride, where the stack is annealed in an oxygen-bearing ambient to achieve a non-stoichiometric composition, enhancing the dielectric properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If conventional HfO2 gate dielectric is used, then high dielectric constant is achieved, but threshold voltage instability occurs
Solution Approach 1:
The patent employs a composite gate dielectric structure consisting of a first high-κ metal oxide layer (HKMOL) and a second HKMOL, with the first layer having higher oxygen vacancy concentration than the second layer. This composite structure combines the high dielectric constant benefit with improved threshold voltage stability by strategically distributing oxygen vacancies to enhance polarization without compromising reliability.
Solution Approach 2:
The patent applies local quality by creating distinct oxygen vacancy concentrations in different regions of the gate dielectric stack. The first HKMOL contains a higher concentration of oxygen vacancies compared to the second HKMOL, allowing localized enhancement of dielectric properties where needed while maintaining overall device reliability.
2Reliability
If conventional HfO2 gate dielectric is used, then high dielectric constant is achieved, but mobility decreases
Solution Approach 1:
The dual-layer HKMOL structure with graded oxygen vacancy concentration optimizes the balance between dielectric performance and carrier mobility. The first layer with higher oxygen vacancies provides strong polarization for high dielectric constant, while the second layer with lower oxygen vacancies reduces scattering centers, thereby improving carrier mobility.
3Reliability
If oxygen vacancies are increased to enhance polarization, then dielectric constant improves, but threshold voltage stability deteriorates
Solution Approach 1:
The patent resolves this contradiction by applying local quality through spatially differentiated oxygen vacancy distribution. The first HKMOL near the interface contains higher oxygen vacancies to maximize polarization and dielectric constant, while the second HKMOL contains fewer oxygen vacancies to maintain threshold voltage stability, thus achieving both goals simultaneously in different regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the stability and reliability of the gate dielectric stack, reducing threshold voltage instability and enhancing mobility, thereby improving the performance and reliability of MOSFETs for low power devices.
Implementation Method 1
annealing the gate dielectric stack
Implementation Method 2
annealing the gate dielectric stack in an oxygen-bearing ambient
Implementation Method 3
incorporating a refractory metal silicon nitride within the high-κ metal-oxide film
Data Source
AI summary
A semiconductor fabrication method includes forming a gate dielectric stack on a semiconductor substrate and annealing the gate dielectric stack. Forming the stack may include depositing a first layer of a metal-oxide dielectric on the substrate, forming a refractory metal silicon nitride on the first layer, and depositing a second layer of the metal-oxide dielectric on the refractory metal silicon nitride. Depositing the first layer may include depositing a metal-oxide dielectric, such as HfO2, using atomic layer deposition. Forming the refractory metal silicon nitride film may include forming a film of tantalum silicon nitride using a physical vapor deposition process. Annealing the gate dielectric stack may include annealing the gate dielectric stack in an oxygen-bearing ambient at approximately 750 C for 10 minutes or less. In one embodiment, annealing the dielectric stack includes annealing the dielectric stack for approximately 60 seconds at a temperature of approximately 500 C.