Modified SPI Interface Addressing for Pin Reduction
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Solution Overview
Problem
Conventional serial peripheral interfaces (SPI) require multiple slave select lines, leading to increased pin requirements and manufacturing costs for master devices, as each slave device necessitates additional pins for communication, limiting the number of pins available for other signaling.
Innovation Solution
The modified SPI interface eliminates the need for slave select lines by using addressed frames with an address header over the MOSI line and embedded I2C interfaces to assign and manage addresses, allowing for duplex data transmission without slave select pins, enabling communication over a three-wire bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SPI architecture uses slave select lines for each slave device, then communication protocol and data transmission are ensured, but the number of pins required in the master device increases with the number of slave devices
Solution Approach 1:
The patent extracts the slave select function from dedicated hardware lines and relocates it to the data stream itself through address headers. Each frame contains an address field that identifies the target slave device, eliminating the need for separate slave select pins while maintaining the ability to selectively communicate with individual slaves on the shared bus.
Solution Approach 2:
The MOSI and MISO data lines are made multi-functional by embedding address information within the data frames themselves. The same lines that carry data also carry addressing information, allowing the bus to serve multiple slave devices without requiring additional dedicated select lines for each device.
2Adaptability or versatility
If conventional SPI architecture allocates dedicated pins for each slave device, then individual slave access is enabled, but manufacturing costs increase due to additional pins
Solution Approach 1:
The patent merges the addressing function with the data transmission function by embedding address headers within the data frames. This consolidation allows the system to access individual slave devices using the same physical lines used for data transmission, thereby reducing the total pin count and associated manufacturing costs.
Solution Approach 2:
The patent changes the parameter of address delivery from a separate control signal (requiring dedicated pins) to an embedded data field within the transmission stream. This parameter change allows individual slave access to be achieved through software/firmware addressing rather than hardware pin allocation, reducing manufacturing complexity.
3Adaptability or versatility
If conventional SPI architecture uses multiple slave select lines, then each slave device can be individually selected, but the number of pins available for other signaling decreases
Solution Approach 1:
The patent moves the addressing information from the spatial dimension (separate physical lines) to the temporal dimension (time-multiplexed data stream). By embedding addresses within the sequential data frames, the system can distinguish between multiple slaves using time-division multiplexing on the same physical lines, freeing up pins for other purposes.
Data Source
AI summary
A modified serial peripheral interface (SPI) is provided in each of a master device and a plurality of slave devices that does not use a slave select line. The master device may thus engage in full-duplex serial communication with each slave device through an SPI MOSI line, an SPI MISO line, and an SPI clock line.